<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "https://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml" lang="en-US">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=11"/>
<meta name="generator" content="Doxygen 1.14.0"/>
<meta name="viewport" content="width=device-width, initial-scale=1"/>
<title>DM-CtrlH7-BF-DevProgram: C:/Users/ASUS/Desktop/dm-ctrlH7-balance-9025test/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h File Reference</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="dynsections.js"></script>
<script type="text/javascript" src="clipboard.js"></script>
<link href="navtree.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="navtreedata.js"></script>
<script type="text/javascript" src="navtree.js"></script>
<script type="text/javascript" src="cookie.js"></script>
<link href="search/search.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="search/searchdata.js"></script>
<script type="text/javascript" src="search/search.js"></script>
<link href="doxygen.css" rel="stylesheet" type="text/css" />
</head>
<body>
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
<div id="titlearea">
<table cellspacing="0" cellpadding="0">
 <tbody>
 <tr id="projectrow">
  <td id="projectlogo"><img alt="Logo" src="50x5.png"/></td>
  <td id="projectalign">
   <div id="projectname">DM-CtrlH7-BF-DevProgram<span id="projectnumber">&#160;beta 0.1</span>
   </div>
   <div id="projectbrief">C.ONE Studio Damiao Development Board Framework</div>
  </td>
 </tr>
 </tbody>
</table>
</div>
<!-- end header part -->
<!-- Generated by Doxygen 1.14.0 -->
<script type="text/javascript">
var searchBox = new SearchBox("searchBox", "search/",'.html');
</script>
<script type="text/javascript">
$(function() { codefold.init(); });
</script>
<script type="text/javascript" src="menudata.js"></script>
<script type="text/javascript" src="menu.js"></script>
<script type="text/javascript">
$(function() {
  initMenu('',true,false,'search.php','Search',true);
  $(function() { init_search(); });
});
</script>
<div id="main-nav"></div>
</div><!-- top -->
<div id="side-nav" class="ui-resizable side-nav-resizable">
  <div id="nav-tree">
    <div id="nav-tree-contents">
      <div id="nav-sync" class="sync"></div>
    </div>
  </div>
  <div id="splitbar" style="-moz-user-select:none;" 
       class="ui-resizable-handle">
  </div>
</div>
<script type="text/javascript">
$(function(){initNavTree('stm32h7xx__hal__rcc__ex_8h.html','',''); });
</script>
<div id="container">
<div id="doc-content">
<!-- window showing the filter options -->
<div id="MSearchSelectWindow"
     onmouseover="return searchBox.OnSearchSelectShow()"
     onmouseout="return searchBox.OnSearchSelectHide()"
     onkeydown="return searchBox.OnSearchSelectKey(event)">
</div>

<!-- iframe showing the search results (closed by default) -->
<div id="MSearchResultsWindow">
<div id="MSearchResults">
<div class="SRPage">
<div id="SRIndex">
<div id="SRResults"></div>
<div class="SRStatus" id="Loading">Loading...</div>
<div class="SRStatus" id="Searching">Searching...</div>
<div class="SRStatus" id="NoMatches">No Matches</div>
</div>
</div>
</div>
</div>

<div class="header">
  <div class="headertitle"><div class="title">stm32h7xx_hal_rcc_ex.h File Reference</div></div>
</div><!--header-->
<div class="contents">

<p>Header file of RCC HAL Extension module.  
<a href="#details">More...</a></p>
<div class="textblock"><code>#include &quot;<a class="el" href="stm32h7xx__hal__def_8h_source.html">stm32h7xx_hal_def.h</a>&quot;</code><br />
</div>
<p><a href="stm32h7xx__hal__rcc__ex_8h_source.html">Go to the source code of this file.</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-nested-classes" class="groupheader"><a id="nested-classes" name="nested-classes"></a>
Classes</h2></td></tr>
<tr class="memitem:RCC_5FPLL2InitTypeDef" id="r_RCC_5FPLL2InitTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_r_c_c___p_l_l2_init_type_def.html">RCC_PLL2InitTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">PLL2 Clock structure definition.  <a href="struct_r_c_c___p_l_l2_init_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:RCC_5FPLL3InitTypeDef" id="r_RCC_5FPLL3InitTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_r_c_c___p_l_l3_init_type_def.html">RCC_PLL3InitTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">PLL3 Clock structure definition.  <a href="struct_r_c_c___p_l_l3_init_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:PLL1_5FClocksTypeDef" id="r_PLL1_5FClocksTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_l_l1___clocks_type_def.html">PLL1_ClocksTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">RCC PLL1 Clocks structure definition.  <a href="struct_p_l_l1___clocks_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:PLL2_5FClocksTypeDef" id="r_PLL2_5FClocksTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_l_l2___clocks_type_def.html">PLL2_ClocksTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">RCC PLL2 Clocks structure definition.  <a href="struct_p_l_l2___clocks_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:PLL3_5FClocksTypeDef" id="r_PLL3_5FClocksTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_l_l3___clocks_type_def.html">PLL3_ClocksTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">RCC PLL3 Clocks structure definition.  <a href="struct_p_l_l3___clocks_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:RCC_5FPeriphCLKInitTypeDef" id="r_RCC_5FPeriphCLKInitTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_r_c_c___periph_c_l_k_init_type_def.html">RCC_PeriphCLKInitTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">RCC extended clocks structure definition.  <a href="struct_r_c_c___periph_c_l_k_init_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:RCC_5FCRSInitTypeDef" id="r_RCC_5FCRSInitTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_r_c_c___c_r_s_init_type_def.html">RCC_CRSInitTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">RCC_CRS Init structure definition.  <a href="struct_r_c_c___c_r_s_init_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:RCC_5FCRSSynchroInfoTypeDef" id="r_RCC_5FCRSSynchroInfoTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_r_c_c___c_r_s_synchro_info_type_def.html">RCC_CRSSynchroInfoTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">RCC_CRS Synchronization structure definition.  <a href="struct_r_c_c___c_r_s_synchro_info_type_def.html#details">More...</a><br /></td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-define-members" class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga067026e18c43c7d3a8436835862b97c5" id="r_ga067026e18c43c7d3a8436835862b97c5"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>I2c1235ClockSelection</b>&#160;&#160;&#160;I2c123ClockSelection</td></tr>
<tr class="memitem:ga54ddeff374b2db50d36a2217d040af41" id="r_ga54ddeff374b2db50d36a2217d040af41"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_USART16</b>&#160;&#160;&#160;((uint64_t)(0x00000001U))</td></tr>
<tr class="memitem:ga45390869c206531ea6d98baefb2315ac" id="r_ga45390869c206531ea6d98baefb2315ac"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_USART1</b>&#160;&#160;&#160;RCC_PERIPHCLK_USART16</td></tr>
<tr class="memitem:ga4f1256bcdac1f0b12fa934dfc989ec4a" id="r_ga4f1256bcdac1f0b12fa934dfc989ec4a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_USART6</b>&#160;&#160;&#160;RCC_PERIPHCLK_USART16</td></tr>
<tr class="memitem:ga90467bc04d8ad94ef2c7c97829724049" id="r_ga90467bc04d8ad94ef2c7c97829724049"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_USART16910</b>&#160;&#160;&#160;RCC_PERIPHCLK_USART16</td></tr>
<tr class="memitem:ga64f415fab5843cf299108977f893b9da" id="r_ga64f415fab5843cf299108977f893b9da"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_USART234578</b>&#160;&#160;&#160;((uint64_t)(0x00000002U))</td></tr>
<tr class="memitem:ga5d259e3e1607db6e547d525043246387" id="r_ga5d259e3e1607db6e547d525043246387"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_USART2</b>&#160;&#160;&#160;RCC_PERIPHCLK_USART234578</td></tr>
<tr class="memitem:ga8640cec93bf5d59d0f1beddd3bd7ec21" id="r_ga8640cec93bf5d59d0f1beddd3bd7ec21"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_USART3</b>&#160;&#160;&#160;RCC_PERIPHCLK_USART234578</td></tr>
<tr class="memitem:ga14d9516d88f0e5a4726ca8d38efd8902" id="r_ga14d9516d88f0e5a4726ca8d38efd8902"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_UART4</b>&#160;&#160;&#160;RCC_PERIPHCLK_USART234578</td></tr>
<tr class="memitem:gad571f04faa1c97e8371741187c2275ed" id="r_gad571f04faa1c97e8371741187c2275ed"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_UART5</b>&#160;&#160;&#160;RCC_PERIPHCLK_USART234578</td></tr>
<tr class="memitem:gaf4db7b92efb0cae82484c0ed97ee6766" id="r_gaf4db7b92efb0cae82484c0ed97ee6766"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_UART7</b>&#160;&#160;&#160;RCC_PERIPHCLK_USART234578</td></tr>
<tr class="memitem:gaff1fa6d45f717fb7ce045eb08685766d" id="r_gaff1fa6d45f717fb7ce045eb08685766d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_UART8</b>&#160;&#160;&#160;RCC_PERIPHCLK_USART234578</td></tr>
<tr class="memitem:ga26dd46ff44eb9a532070bb3790ce0086" id="r_ga26dd46ff44eb9a532070bb3790ce0086"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_LPUART1</b>&#160;&#160;&#160;((uint64_t)(0x00000004U))</td></tr>
<tr class="memitem:ga282acd83d464231efa634331b10e9a4d" id="r_ga282acd83d464231efa634331b10e9a4d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_I2C123</b>&#160;&#160;&#160;((uint64_t)(0x00000008U))</td></tr>
<tr class="memitem:gafe21bb1cd8d7004373b236a8dd90fd92" id="r_gafe21bb1cd8d7004373b236a8dd90fd92"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_I2C1</b>&#160;&#160;&#160;RCC_PERIPHCLK_I2C123</td></tr>
<tr class="memitem:gad3ca02c3ca6c548484cd1302c8adbb53" id="r_gad3ca02c3ca6c548484cd1302c8adbb53"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_I2C2</b>&#160;&#160;&#160;RCC_PERIPHCLK_I2C123</td></tr>
<tr class="memitem:ga9fa8ac7959aeb5b76fdd780fbc1754f3" id="r_ga9fa8ac7959aeb5b76fdd780fbc1754f3"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_I2C3</b>&#160;&#160;&#160;RCC_PERIPHCLK_I2C123</td></tr>
<tr class="memitem:ga43446cae0c5716620fd3bb0ab129715b" id="r_ga43446cae0c5716620fd3bb0ab129715b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_I2C4</b>&#160;&#160;&#160;((uint64_t)(0x00000010U))</td></tr>
<tr class="memitem:ga56ca7e8b3726ee68934795277eb0cbce" id="r_ga56ca7e8b3726ee68934795277eb0cbce"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_LPTIM1</b>&#160;&#160;&#160;((uint64_t)(0x00000020U))</td></tr>
<tr class="memitem:ga561fc62cb1c8790b7647d9a6fd24818d" id="r_ga561fc62cb1c8790b7647d9a6fd24818d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_LPTIM2</b>&#160;&#160;&#160;((uint64_t)(0x00000040U))</td></tr>
<tr class="memitem:ga0b49d5ee0ada7638b26f60ac1f52c23c" id="r_ga0b49d5ee0ada7638b26f60ac1f52c23c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_LPTIM345</b>&#160;&#160;&#160;((uint64_t)(0x00000080U))</td></tr>
<tr class="memitem:gae53cf22ab47a35dc16400b6df35b4977" id="r_gae53cf22ab47a35dc16400b6df35b4977"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_LPTIM3</b>&#160;&#160;&#160;RCC_PERIPHCLK_LPTIM345</td></tr>
<tr class="memitem:ga9b5a57e48c326c3b477b8361f6f246b8" id="r_ga9b5a57e48c326c3b477b8361f6f246b8"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_SAI1</b>&#160;&#160;&#160;((uint64_t)(0x00000100U))</td></tr>
<tr class="memitem:gaf8c4aab56fe7efe14ef559cb6625daa3" id="r_gaf8c4aab56fe7efe14ef559cb6625daa3"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_SPI123</b>&#160;&#160;&#160;((uint64_t)(0x00001000U))</td></tr>
<tr class="memitem:ga242ac97af2b567865cc6b91c11ed09df" id="r_ga242ac97af2b567865cc6b91c11ed09df"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_SPI1</b>&#160;&#160;&#160;RCC_PERIPHCLK_SPI123</td></tr>
<tr class="memitem:gad4bbf2edddc0e0aacf619c9745be3bfa" id="r_gad4bbf2edddc0e0aacf619c9745be3bfa"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_SPI2</b>&#160;&#160;&#160;RCC_PERIPHCLK_SPI123</td></tr>
<tr class="memitem:ga9297836782024ef6dfe373baf6246138" id="r_ga9297836782024ef6dfe373baf6246138"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_SPI3</b>&#160;&#160;&#160;RCC_PERIPHCLK_SPI123</td></tr>
<tr class="memitem:ga7bfb4c81ab8d98c5dc871f7f0b0a6a23" id="r_ga7bfb4c81ab8d98c5dc871f7f0b0a6a23"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_SPI45</b>&#160;&#160;&#160;((uint64_t)(0x00002000U))</td></tr>
<tr class="memitem:ga832e212ce9296bdb492608c6f1903b4e" id="r_ga832e212ce9296bdb492608c6f1903b4e"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_SPI4</b>&#160;&#160;&#160;RCC_PERIPHCLK_SPI45</td></tr>
<tr class="memitem:gacde333f621500717799555d68085adab" id="r_gacde333f621500717799555d68085adab"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_SPI5</b>&#160;&#160;&#160;RCC_PERIPHCLK_SPI45</td></tr>
<tr class="memitem:gaa9c7d698e69f5a590a9e6a2153859b0c" id="r_gaa9c7d698e69f5a590a9e6a2153859b0c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_SPI6</b>&#160;&#160;&#160;((uint64_t)(0x00004000U))</td></tr>
<tr class="memitem:gaf3b7c71407e825f89f9c0b0ac1bf20fc" id="r_gaf3b7c71407e825f89f9c0b0ac1bf20fc"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_FDCAN</b>&#160;&#160;&#160;((uint64_t)(0x00008000U))</td></tr>
<tr class="memitem:gaf0fd9e547da2fba4a071a4ad6153d24a" id="r_gaf0fd9e547da2fba4a071a4ad6153d24a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_SDMMC</b>&#160;&#160;&#160;((uint64_t)(0x00010000U))</td></tr>
<tr class="memitem:ga0390b2c914194fb8ed71ec93c7b3bef1" id="r_ga0390b2c914194fb8ed71ec93c7b3bef1"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_RNG</b>&#160;&#160;&#160;((uint64_t)(0x00020000U))</td></tr>
<tr class="memitem:gadcb42dbf21f29d046443b8158f95fb81" id="r_gadcb42dbf21f29d046443b8158f95fb81"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_USB</b>&#160;&#160;&#160;((uint64_t)(0x00040000U))</td></tr>
<tr class="memitem:gaa234e496ace2f188b106dc15a95ed6bc" id="r_gaa234e496ace2f188b106dc15a95ed6bc"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_ADC</b>&#160;&#160;&#160;((uint64_t)(0x00080000U))</td></tr>
<tr class="memitem:ga6c88e64f3bcb820efd9f7d65d9aee729" id="r_ga6c88e64f3bcb820efd9f7d65d9aee729"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_SWPMI1</b>&#160;&#160;&#160;((uint64_t)(0x00100000U))</td></tr>
<tr class="memitem:gae6bdd3eb25568e35eed326af9b75d359" id="r_gae6bdd3eb25568e35eed326af9b75d359"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_DFSDM1</b>&#160;&#160;&#160;((uint64_t)(0x00200000U))</td></tr>
<tr class="memitem:gaede03aaafb5319bb39767bf50182406f" id="r_gaede03aaafb5319bb39767bf50182406f"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_RTC</b>&#160;&#160;&#160;((uint64_t)(0x00400000U))</td></tr>
<tr class="memitem:gae7b08ed2b8df3517d5de1013e2f4ac8e" id="r_gae7b08ed2b8df3517d5de1013e2f4ac8e"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_CEC</b>&#160;&#160;&#160;((uint64_t)(0x00800000U))</td></tr>
<tr class="memitem:gab42d62d34c68d96f93e4cbb9a0b03af5" id="r_gab42d62d34c68d96f93e4cbb9a0b03af5"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_FMC</b>&#160;&#160;&#160;((uint64_t)(0x01000000U))</td></tr>
<tr class="memitem:gaedf8160ad5c145e88f671d092f1f32cd" id="r_gaedf8160ad5c145e88f671d092f1f32cd"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_DSI</b>&#160;&#160;&#160;((uint64_t)(0x04000000U))</td></tr>
<tr class="memitem:gae696b64cfe8a0c2ba96030c427fa77d5" id="r_gae696b64cfe8a0c2ba96030c427fa77d5"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_SPDIFRX</b>&#160;&#160;&#160;((uint64_t)(0x08000000U))</td></tr>
<tr class="memitem:ga6a377fb8665c389cb263cddbfa44bec6" id="r_ga6a377fb8665c389cb263cddbfa44bec6"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_TIM</b>&#160;&#160;&#160;((uint64_t)(0x40000000U))</td></tr>
<tr class="memitem:ga510c6f116e397f75d30024f32510a917" id="r_ga510c6f116e397f75d30024f32510a917"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_CKPER</b>&#160;&#160;&#160;((uint64_t)(0x80000000U))</td></tr>
<tr class="memitem:gaca726c9d3f477132b290e44ba2b3fe27" id="r_gaca726c9d3f477132b290e44ba2b3fe27"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_PLL2_DIVP</b>&#160;&#160;&#160;((uint64_t)(0x0000000100000000U))</td></tr>
<tr class="memitem:ga67a5cf27bc18ab5069f7b7123b44434c" id="r_ga67a5cf27bc18ab5069f7b7123b44434c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_PLL2_DIVQ</b>&#160;&#160;&#160;((uint64_t)(0x0000000200000000U))</td></tr>
<tr class="memitem:ga6a4c8849a3e060c14f3999de8774db47" id="r_ga6a4c8849a3e060c14f3999de8774db47"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_PLL2_DIVR</b>&#160;&#160;&#160;((uint64_t)(0x0000000400000000U))</td></tr>
<tr class="memitem:ga29f8e1e66193cf9be7b173b048050ddc" id="r_ga29f8e1e66193cf9be7b173b048050ddc"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_PLL3_DIVP</b>&#160;&#160;&#160;((uint64_t)(0x0000000800000000U))</td></tr>
<tr class="memitem:ga7f2ef556e3657385cdf74508031f72bb" id="r_ga7f2ef556e3657385cdf74508031f72bb"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_PLL3_DIVQ</b>&#160;&#160;&#160;((uint64_t)(0x0000001000000000U))</td></tr>
<tr class="memitem:ga63721d0d7b5c19f5d689e8032addd2e7" id="r_ga63721d0d7b5c19f5d689e8032addd2e7"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_PLL3_DIVR</b>&#160;&#160;&#160;((uint64_t)(0x0000002000000000U))</td></tr>
<tr class="memitem:gad1a8a81a015f275a253b4d399c0016b9" id="r_gad1a8a81a015f275a253b4d399c0016b9"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLL2_DIVP</b>&#160;&#160;&#160;RCC_PLLCFGR_DIVP2EN</td></tr>
<tr class="memitem:ga06627c6c5a9c03fafd82d1bbb8916dd8" id="r_ga06627c6c5a9c03fafd82d1bbb8916dd8"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLL2_DIVQ</b>&#160;&#160;&#160;RCC_PLLCFGR_DIVQ2EN</td></tr>
<tr class="memitem:ga23a9f811301522d6b81ad0b1cc249d1e" id="r_ga23a9f811301522d6b81ad0b1cc249d1e"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLL2_DIVR</b>&#160;&#160;&#160;RCC_PLLCFGR_DIVR2EN</td></tr>
<tr class="memitem:ga664df2bf7bbe2f75e073e27c6c8fb40c" id="r_ga664df2bf7bbe2f75e073e27c6c8fb40c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLL3_DIVP</b>&#160;&#160;&#160;RCC_PLLCFGR_DIVP3EN</td></tr>
<tr class="memitem:ga58150c9e8b0085fb5a0e53248b0c7262" id="r_ga58150c9e8b0085fb5a0e53248b0c7262"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLL3_DIVQ</b>&#160;&#160;&#160;RCC_PLLCFGR_DIVQ3EN</td></tr>
<tr class="memitem:gacbb8dc9089f9de817a2acc3a18208203" id="r_gacbb8dc9089f9de817a2acc3a18208203"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLL3_DIVR</b>&#160;&#160;&#160;RCC_PLLCFGR_DIVR3EN</td></tr>
<tr class="memitem:gab08c467767de4d7b5428c7c86d3ff1f7" id="r_gab08c467767de4d7b5428c7c86d3ff1f7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___p_l_l2___v_c_i___range.html#gab08c467767de4d7b5428c7c86d3ff1f7">RCC_PLL2VCIRANGE_0</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga8d1dbd385df9a330b0919f75de1f6308">RCC_PLLCFGR_PLL2RGE_0</a></td></tr>
<tr class="memitem:ga8f9329970c0f8741a8da1023cd787a7b" id="r_ga8f9329970c0f8741a8da1023cd787a7b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___p_l_l2___v_c_i___range.html#ga8f9329970c0f8741a8da1023cd787a7b">RCC_PLL2VCIRANGE_1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga3b160f559489b51a6526f95cc70d4c80">RCC_PLLCFGR_PLL2RGE_1</a></td></tr>
<tr class="memitem:ga530351f4353039d7593526f63a3415c2" id="r_ga530351f4353039d7593526f63a3415c2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___p_l_l2___v_c_i___range.html#ga530351f4353039d7593526f63a3415c2">RCC_PLL2VCIRANGE_2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga2aca79bebc2d3a00a41f0519cf42dfe3">RCC_PLLCFGR_PLL2RGE_2</a></td></tr>
<tr class="memitem:ga22d1f970359251ef7b90c78ec08824c4" id="r_ga22d1f970359251ef7b90c78ec08824c4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___p_l_l2___v_c_i___range.html#ga22d1f970359251ef7b90c78ec08824c4">RCC_PLL2VCIRANGE_3</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab1cf1d904d667e5a554e16f701d85331">RCC_PLLCFGR_PLL2RGE_3</a></td></tr>
<tr class="memitem:ga56857c01dd2bbe966f802c035ee9e2c0" id="r_ga56857c01dd2bbe966f802c035ee9e2c0"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLL2VCOWIDE</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga1c2b1b476d380d2b0888677714667342" id="r_ga1c2b1b476d380d2b0888677714667342"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLL2VCOMEDIUM</b>&#160;&#160;&#160;RCC_PLLCFGR_PLL2VCOSEL</td></tr>
<tr class="memitem:ga14521fc6d51aa54cb10fb52cd367dc47" id="r_ga14521fc6d51aa54cb10fb52cd367dc47"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___p_l_l3___v_c_i___range.html#ga14521fc6d51aa54cb10fb52cd367dc47">RCC_PLL3VCIRANGE_0</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaa7487553018c704a0a4b0c28b7a1d3c3">RCC_PLLCFGR_PLL3RGE_0</a></td></tr>
<tr class="memitem:gaa3b6d5fd3eee7fbc2b4d48cee8396d4d" id="r_gaa3b6d5fd3eee7fbc2b4d48cee8396d4d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___p_l_l3___v_c_i___range.html#gaa3b6d5fd3eee7fbc2b4d48cee8396d4d">RCC_PLL3VCIRANGE_1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga8cb01d15ad48bbb79ee7f26f0ca4b5fe">RCC_PLLCFGR_PLL3RGE_1</a></td></tr>
<tr class="memitem:gaa565b568622f558d518adbed7c9a7777" id="r_gaa565b568622f558d518adbed7c9a7777"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___p_l_l3___v_c_i___range.html#gaa565b568622f558d518adbed7c9a7777">RCC_PLL3VCIRANGE_2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaebf059ec4b4a804a5dc38035e1b36d50">RCC_PLLCFGR_PLL3RGE_2</a></td></tr>
<tr class="memitem:gae438af331e892098d7086270a500ab83" id="r_gae438af331e892098d7086270a500ab83"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___p_l_l3___v_c_i___range.html#gae438af331e892098d7086270a500ab83">RCC_PLL3VCIRANGE_3</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga460bb2cdd4006fddb37449f097094ad9">RCC_PLLCFGR_PLL3RGE_3</a></td></tr>
<tr class="memitem:ga16dd5bd55b8c1b8f4e9fec88856ee8ce" id="r_ga16dd5bd55b8c1b8f4e9fec88856ee8ce"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLL3VCOWIDE</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:gad19932e7ba49dbc725c06c977e6f13e9" id="r_gad19932e7ba49dbc725c06c977e6f13e9"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLL3VCOMEDIUM</b>&#160;&#160;&#160;RCC_PLLCFGR_PLL3VCOSEL</td></tr>
<tr class="memitem:ga59039123ab793506c5bc79581226fe57" id="r_ga59039123ab793506c5bc79581226fe57"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART16910CLKSOURCE_D2PCLK2</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga454c0298e99aef0fcbb3824229e2aa73" id="r_ga454c0298e99aef0fcbb3824229e2aa73"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART16910CLKSOURCE_PLL2</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga4fdca01a55d97e2c6937f9d6d22ea506">RCC_D2CCIP2R_USART16910SEL_0</a></td></tr>
<tr class="memitem:ga3b533f0614d5834f30e2d493de7ad0ed" id="r_ga3b533f0614d5834f30e2d493de7ad0ed"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART16910CLKSOURCE_PLL3</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga2b531cec7709c5a46dfc8e160cf1fd1f">RCC_D2CCIP2R_USART16910SEL_1</a></td></tr>
<tr class="memitem:ga5321c4cfee175a97de903ec0b6796e76" id="r_ga5321c4cfee175a97de903ec0b6796e76"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART16910CLKSOURCE_HSI</b>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga4fdca01a55d97e2c6937f9d6d22ea506">RCC_D2CCIP2R_USART16910SEL_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga2b531cec7709c5a46dfc8e160cf1fd1f">RCC_D2CCIP2R_USART16910SEL_1</a>)</td></tr>
<tr class="memitem:ga2547ad844123ac0936c36a2eb628ef9b" id="r_ga2547ad844123ac0936c36a2eb628ef9b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART16910CLKSOURCE_CSI</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga1ef3582f002ae1143b192d5e3a7ac9f4">RCC_D2CCIP2R_USART16910SEL_2</a></td></tr>
<tr class="memitem:gab02e42e22dc1b6e036fd1c0a41bd7778" id="r_gab02e42e22dc1b6e036fd1c0a41bd7778"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART16910CLKSOURCE_LSE</b>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga4fdca01a55d97e2c6937f9d6d22ea506">RCC_D2CCIP2R_USART16910SEL_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga1ef3582f002ae1143b192d5e3a7ac9f4">RCC_D2CCIP2R_USART16910SEL_2</a>)</td></tr>
<tr class="memitem:ga1eb80cbc062aa822618f9ba35be7450d" id="r_ga1eb80cbc062aa822618f9ba35be7450d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART16CLKSOURCE_D2PCLK2</b>&#160;&#160;&#160;RCC_USART16910CLKSOURCE_D2PCLK2</td></tr>
<tr class="memitem:gaa437b084f1801cf187602874fac78099" id="r_gaa437b084f1801cf187602874fac78099"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART16CLKSOURCE_PCLK2</b>&#160;&#160;&#160;RCC_USART16910CLKSOURCE_D2PCLK2</td></tr>
<tr class="memitem:ga79a0c6d9edd464957521646ac448b0d2" id="r_ga79a0c6d9edd464957521646ac448b0d2"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART16CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_USART16910CLKSOURCE_PLL2</td></tr>
<tr class="memitem:ga51e714999f5025f65333dd0aa3fff570" id="r_ga51e714999f5025f65333dd0aa3fff570"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART16CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_USART16910CLKSOURCE_PLL3</td></tr>
<tr class="memitem:ga9af8c7d1c7c73a9ac2922b51f2f9fdfb" id="r_ga9af8c7d1c7c73a9ac2922b51f2f9fdfb"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART16CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_USART16910CLKSOURCE_HSI</td></tr>
<tr class="memitem:ga2c35468d9c9a715041fa956aa0fdbea2" id="r_ga2c35468d9c9a715041fa956aa0fdbea2"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART16CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_USART16910CLKSOURCE_CSI</td></tr>
<tr class="memitem:ga483e0f749b5502232ff81ff1389206f4" id="r_ga483e0f749b5502232ff81ff1389206f4"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART16CLKSOURCE_LSE</b>&#160;&#160;&#160;RCC_USART16910CLKSOURCE_LSE</td></tr>
<tr class="memitem:ga6199929d4dc961152b782526dfa70180" id="r_ga6199929d4dc961152b782526dfa70180"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART1CLKSOURCE_D2PCLK2</b>&#160;&#160;&#160;RCC_USART16CLKSOURCE_D2PCLK2</td></tr>
<tr class="memitem:ga871376d3bf70ff656dd55f4065962564" id="r_ga871376d3bf70ff656dd55f4065962564"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART1CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_USART16CLKSOURCE_PLL2</td></tr>
<tr class="memitem:ga0dd9d4bd4961a879119e24ac869e9c6f" id="r_ga0dd9d4bd4961a879119e24ac869e9c6f"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART1CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_USART16CLKSOURCE_PLL3</td></tr>
<tr class="memitem:ga15818f4637d9721117cf6751ad79af28" id="r_ga15818f4637d9721117cf6751ad79af28"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART1CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_USART16CLKSOURCE_HSI</td></tr>
<tr class="memitem:gad5bc8eb5f52cce7e2b4fb80c088438d3" id="r_gad5bc8eb5f52cce7e2b4fb80c088438d3"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART1CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_USART16CLKSOURCE_CSI</td></tr>
<tr class="memitem:gac2e82299a4295d0e5bf42950f99ddb39" id="r_gac2e82299a4295d0e5bf42950f99ddb39"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART1CLKSOURCE_LSE</b>&#160;&#160;&#160;RCC_USART16CLKSOURCE_LSE</td></tr>
<tr class="memitem:ga5bd535ca4dbc6c6a5597cdbc718d6368" id="r_ga5bd535ca4dbc6c6a5597cdbc718d6368"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART6CLKSOURCE_D2PCLK2</b>&#160;&#160;&#160;RCC_USART16CLKSOURCE_D2PCLK2</td></tr>
<tr class="memitem:gad27a8c4096a4a04463132bd3981a72bc" id="r_gad27a8c4096a4a04463132bd3981a72bc"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART6CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_USART16CLKSOURCE_PLL2</td></tr>
<tr class="memitem:gad71852142700ba2799df014dcb1eb50d" id="r_gad71852142700ba2799df014dcb1eb50d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART6CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_USART16CLKSOURCE_PLL3</td></tr>
<tr class="memitem:ga23a3c393f53c54bfda6344a0105437e0" id="r_ga23a3c393f53c54bfda6344a0105437e0"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART6CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_USART16CLKSOURCE_HSI</td></tr>
<tr class="memitem:gaad35c77399bf5cc6083d6320087170e4" id="r_gaad35c77399bf5cc6083d6320087170e4"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART6CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_USART16CLKSOURCE_CSI</td></tr>
<tr class="memitem:gad1c7cb7a9b496f577bc87bda61534313" id="r_gad1c7cb7a9b496f577bc87bda61534313"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART6CLKSOURCE_LSE</b>&#160;&#160;&#160;RCC_USART16CLKSOURCE_LSE</td></tr>
<tr class="memitem:ga30581883f17bae5715a4a4d043930d5d" id="r_ga30581883f17bae5715a4a4d043930d5d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART234578CLKSOURCE_CDPCLK1</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga27a5ab8288f33d584d746b0902255a47" id="r_ga27a5ab8288f33d584d746b0902255a47"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART234578CLKSOURCE_PCLK1</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_CDPCLK1</td></tr>
<tr class="memitem:ga305a64a4b87606c75227e9d90ea31df2" id="r_ga305a64a4b87606c75227e9d90ea31df2"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART234578CLKSOURCE_D2PCLK1</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_CDPCLK1</td></tr>
<tr class="memitem:gad3d143447de46a306282b7f1c2b5c680" id="r_gad3d143447de46a306282b7f1c2b5c680"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART234578CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_CDCCIP2R_USART234578SEL_0</td></tr>
<tr class="memitem:ga3ec34de2376f899e2cf8e686641db386" id="r_ga3ec34de2376f899e2cf8e686641db386"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART234578CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_CDCCIP2R_USART234578SEL_1</td></tr>
<tr class="memitem:ga6de28a2265e45e2b754ea7ca398fc087" id="r_ga6de28a2265e45e2b754ea7ca398fc087"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART234578CLKSOURCE_HSI</b>&#160;&#160;&#160;(RCC_CDCCIP2R_USART234578SEL_0 | RCC_CDCCIP2R_USART234578SEL_1)</td></tr>
<tr class="memitem:ga4dd0846b76200dbd72e1d734caa861aa" id="r_ga4dd0846b76200dbd72e1d734caa861aa"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART234578CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_CDCCIP2R_USART234578SEL_2</td></tr>
<tr class="memitem:gacae24e07e782d267e97c2944bc118ece" id="r_gacae24e07e782d267e97c2944bc118ece"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART234578CLKSOURCE_LSE</b>&#160;&#160;&#160;(RCC_CDCCIP2R_USART234578SEL_0 | RCC_CDCCIP2R_USART234578SEL_2)</td></tr>
<tr class="memitem:ga05a925ee86e7a114a7ba0572800cb22d" id="r_ga05a925ee86e7a114a7ba0572800cb22d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART2CLKSOURCE_D2PCLK1</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_D2PCLK1</td></tr>
<tr class="memitem:gaa213c77a902673510f06f91824a80e19" id="r_gaa213c77a902673510f06f91824a80e19"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART2CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_PLL2</td></tr>
<tr class="memitem:gacf2935b3962b17a163aee131b4d15f2b" id="r_gacf2935b3962b17a163aee131b4d15f2b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART2CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_PLL3</td></tr>
<tr class="memitem:gae2ca7c150d24aa19b3cdfff9859872fc" id="r_gae2ca7c150d24aa19b3cdfff9859872fc"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART2CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_HSI</td></tr>
<tr class="memitem:ga637874047b80bb5fddef8ab64e2aab3b" id="r_ga637874047b80bb5fddef8ab64e2aab3b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART2CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_CSI</td></tr>
<tr class="memitem:gae95fa6fc4e888e6ea48d8f83ea4c0f4b" id="r_gae95fa6fc4e888e6ea48d8f83ea4c0f4b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART2CLKSOURCE_LSE</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_LSE</td></tr>
<tr class="memitem:gaf5c74b51130bd77a233cc673cdc60e5d" id="r_gaf5c74b51130bd77a233cc673cdc60e5d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART3CLKSOURCE_D2PCLK1</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_D2PCLK1</td></tr>
<tr class="memitem:ga15894a3847cca12ef03ece035c43cf51" id="r_ga15894a3847cca12ef03ece035c43cf51"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART3CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_PLL2</td></tr>
<tr class="memitem:gae00e2c4019d100b14c4a2b5c018a077a" id="r_gae00e2c4019d100b14c4a2b5c018a077a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART3CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_PLL3</td></tr>
<tr class="memitem:ga30b33821af3544a53ec417077be17d5a" id="r_ga30b33821af3544a53ec417077be17d5a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART3CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_HSI</td></tr>
<tr class="memitem:gaab483bc7c51867961007384a930c4349" id="r_gaab483bc7c51867961007384a930c4349"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART3CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_CSI</td></tr>
<tr class="memitem:ga423ec12947162063f7f460798274793a" id="r_ga423ec12947162063f7f460798274793a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USART3CLKSOURCE_LSE</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_LSE</td></tr>
<tr class="memitem:gac2ea6d2e024359e89a75f8ece2ae3da8" id="r_gac2ea6d2e024359e89a75f8ece2ae3da8"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART4CLKSOURCE_D2PCLK1</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_D2PCLK1</td></tr>
<tr class="memitem:ga13fd3c427b08e4e765a8fd41ddfe2ec3" id="r_ga13fd3c427b08e4e765a8fd41ddfe2ec3"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART4CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_PLL2</td></tr>
<tr class="memitem:ga39c498ea6ab29c1e09bde94877415b8a" id="r_ga39c498ea6ab29c1e09bde94877415b8a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART4CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_PLL3</td></tr>
<tr class="memitem:ga784a4f3f93b632fc639af377fd22d209" id="r_ga784a4f3f93b632fc639af377fd22d209"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART4CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_HSI</td></tr>
<tr class="memitem:ga9e8623d835c58e6b62a3a68bbde55558" id="r_ga9e8623d835c58e6b62a3a68bbde55558"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART4CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_CSI</td></tr>
<tr class="memitem:gaae30868211d2839e9975c496332c23fd" id="r_gaae30868211d2839e9975c496332c23fd"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART4CLKSOURCE_LSE</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_LSE</td></tr>
<tr class="memitem:gacd8baaceae01f3f0e2fdbe33ada087d9" id="r_gacd8baaceae01f3f0e2fdbe33ada087d9"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART5CLKSOURCE_D2PCLK1</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_D2PCLK1</td></tr>
<tr class="memitem:ga177c92d5869344379a30fe6ae7b33d38" id="r_ga177c92d5869344379a30fe6ae7b33d38"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART5CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_PLL2</td></tr>
<tr class="memitem:gaa93d012070d23e22b93f0ae4f624ad6e" id="r_gaa93d012070d23e22b93f0ae4f624ad6e"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART5CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_PLL3</td></tr>
<tr class="memitem:ga04b78012371f9aa8e9993fdcec09142c" id="r_ga04b78012371f9aa8e9993fdcec09142c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART5CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_HSI</td></tr>
<tr class="memitem:ga1cfab60dc8fdda8f2a34d6c399750c1e" id="r_ga1cfab60dc8fdda8f2a34d6c399750c1e"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART5CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_CSI</td></tr>
<tr class="memitem:gadc9f986ea62a5adb4fa6777fd9d7219a" id="r_gadc9f986ea62a5adb4fa6777fd9d7219a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART5CLKSOURCE_LSE</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_LSE</td></tr>
<tr class="memitem:ga5615078edc10bef0f9ccfc1057b12410" id="r_ga5615078edc10bef0f9ccfc1057b12410"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART7CLKSOURCE_D2PCLK1</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_D2PCLK1</td></tr>
<tr class="memitem:gaf363f0bba1c90ca0ad7caef7d87a8e6f" id="r_gaf363f0bba1c90ca0ad7caef7d87a8e6f"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART7CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_PLL2</td></tr>
<tr class="memitem:ga6aabdef991ffb0d91f0d0c80349d71ad" id="r_ga6aabdef991ffb0d91f0d0c80349d71ad"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART7CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_PLL3</td></tr>
<tr class="memitem:ga3111806bfc93535645e7097bfd446151" id="r_ga3111806bfc93535645e7097bfd446151"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART7CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_HSI</td></tr>
<tr class="memitem:ga0509ff9e391180ca7c318801cf10c5c2" id="r_ga0509ff9e391180ca7c318801cf10c5c2"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART7CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_CSI</td></tr>
<tr class="memitem:ga391e0c8bbbb17d9c9d4776c8fedc374c" id="r_ga391e0c8bbbb17d9c9d4776c8fedc374c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART7CLKSOURCE_LSE</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_LSE</td></tr>
<tr class="memitem:gad515e2b34b0e80f3e7b158e900da57d1" id="r_gad515e2b34b0e80f3e7b158e900da57d1"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART8CLKSOURCE_D2PCLK1</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_D2PCLK1</td></tr>
<tr class="memitem:ga09d1753cfa6c1d452d5f0b78122d2eeb" id="r_ga09d1753cfa6c1d452d5f0b78122d2eeb"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART8CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_PLL2</td></tr>
<tr class="memitem:gaec8e0f9c0e9be444ca220a34ed126a84" id="r_gaec8e0f9c0e9be444ca220a34ed126a84"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART8CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_PLL3</td></tr>
<tr class="memitem:ga76309a914b9bde64d471c5bc0c227d46" id="r_ga76309a914b9bde64d471c5bc0c227d46"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART8CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_HSI</td></tr>
<tr class="memitem:ga04dcc1b2317a90dfc908c0f2274c26a4" id="r_ga04dcc1b2317a90dfc908c0f2274c26a4"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART8CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_CSI</td></tr>
<tr class="memitem:gaea73a8609e9c51acce01c6980623bfde" id="r_gaea73a8609e9c51acce01c6980623bfde"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_UART8CLKSOURCE_LSE</b>&#160;&#160;&#160;RCC_USART234578CLKSOURCE_LSE</td></tr>
<tr class="memitem:gabc6a5d2f62ea463b7dee3e07d4de1de5" id="r_gabc6a5d2f62ea463b7dee3e07d4de1de5"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPUART1CLKSOURCE_SRDPCLK4</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:gabed023a11092add20f286d81ef1118d3" id="r_gabed023a11092add20f286d81ef1118d3"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPUART1CLKSOURCE_PCLK4</b>&#160;&#160;&#160;RCC_LPUART1CLKSOURCE_SRDPCLK4</td></tr>
<tr class="memitem:gab0aa42f8be2a5e9d6a4d3fad8b4ba1ed" id="r_gab0aa42f8be2a5e9d6a4d3fad8b4ba1ed"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPUART1CLKSOURCE_D3PCLK1</b>&#160;&#160;&#160;RCC_LPUART1CLKSOURCE_SRDPCLK4</td></tr>
<tr class="memitem:gab61aaa04caaf1a51d14698578c86ac6d" id="r_gab61aaa04caaf1a51d14698578c86ac6d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPUART1CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_SRDCCIPR_LPUART1SEL_0</td></tr>
<tr class="memitem:ga8b09c48c67f59eb78c11b714d54f1e02" id="r_ga8b09c48c67f59eb78c11b714d54f1e02"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPUART1CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_SRDCCIPR_LPUART1SEL_1</td></tr>
<tr class="memitem:gacbe5b8226a6804b33af9409d3de4986d" id="r_gacbe5b8226a6804b33af9409d3de4986d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPUART1CLKSOURCE_HSI</b>&#160;&#160;&#160;(RCC_SRDCCIPR_LPUART1SEL_0 | RCC_SRDCCIPR_LPUART1SEL_1)</td></tr>
<tr class="memitem:ga93f8bebe1b4f3434794beb18549fad6d" id="r_ga93f8bebe1b4f3434794beb18549fad6d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPUART1CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_SRDCCIPR_LPUART1SEL_2</td></tr>
<tr class="memitem:gaf12ce77cb8bf9ec5b4053c7c3df8d8a0" id="r_gaf12ce77cb8bf9ec5b4053c7c3df8d8a0"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPUART1CLKSOURCE_LSE</b>&#160;&#160;&#160;(RCC_SRDCCIPR_LPUART1SEL_2 | RCC_SRDCCIPR_LPUART1SEL_0)</td></tr>
<tr class="memitem:gaf15b7facb255a4bb9d83c2b3c282bea9" id="r_gaf15b7facb255a4bb9d83c2b3c282bea9"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C1CLKSOURCE_D2PCLK1</b>&#160;&#160;&#160;RCC_I2C123CLKSOURCE_D2PCLK1</td></tr>
<tr class="memitem:ga5b19521d83bbca302b707f97076786ba" id="r_ga5b19521d83bbca302b707f97076786ba"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C1CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_I2C123CLKSOURCE_PLL3</td></tr>
<tr class="memitem:ga5645524b292048cfe127da02ba9b3df7" id="r_ga5645524b292048cfe127da02ba9b3df7"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C1CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_I2C123CLKSOURCE_HSI</td></tr>
<tr class="memitem:gab441e477902a86bf58356e078e50b074" id="r_gab441e477902a86bf58356e078e50b074"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C1CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_I2C123CLKSOURCE_CSI</td></tr>
<tr class="memitem:ga4c1d277a9e8826e43ec7b6b62565930d" id="r_ga4c1d277a9e8826e43ec7b6b62565930d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C2CLKSOURCE_D2PCLK1</b>&#160;&#160;&#160;RCC_I2C123CLKSOURCE_D2PCLK1</td></tr>
<tr class="memitem:ga4c8879f57583423efce93b5420213d15" id="r_ga4c8879f57583423efce93b5420213d15"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C2CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_I2C123CLKSOURCE_PLL3</td></tr>
<tr class="memitem:gab2d1849bb1ec2df29cab79843441e3cc" id="r_gab2d1849bb1ec2df29cab79843441e3cc"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C2CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_I2C123CLKSOURCE_HSI</td></tr>
<tr class="memitem:ga34323d683125806be2a0df9125fccb0e" id="r_ga34323d683125806be2a0df9125fccb0e"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C2CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_I2C123CLKSOURCE_CSI</td></tr>
<tr class="memitem:gac4ef07105300e4cd0abe19ec4779247b" id="r_gac4ef07105300e4cd0abe19ec4779247b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C3CLKSOURCE_D2PCLK1</b>&#160;&#160;&#160;RCC_I2C123CLKSOURCE_D2PCLK1</td></tr>
<tr class="memitem:ga35d5737ea01bba391e4b786447b4f24f" id="r_ga35d5737ea01bba391e4b786447b4f24f"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C3CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_I2C123CLKSOURCE_PLL3</td></tr>
<tr class="memitem:ga15d4072c90a04b2393e49f05dc3c8fd2" id="r_ga15d4072c90a04b2393e49f05dc3c8fd2"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C3CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_I2C123CLKSOURCE_HSI</td></tr>
<tr class="memitem:ga9634b207d23e47dfc64ba9f1ab2d3320" id="r_ga9634b207d23e47dfc64ba9f1ab2d3320"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C3CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_I2C123CLKSOURCE_CSI</td></tr>
<tr class="memitem:gaad7e10f8c163af6e2bf7754e60317fbc" id="r_gaad7e10f8c163af6e2bf7754e60317fbc"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C4CLKSOURCE_SRDPCLK4</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:gaac1a7c74fc89ee94914fdb94436472e1" id="r_gaac1a7c74fc89ee94914fdb94436472e1"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C4CLKSOURCE_D3PCLK1</b>&#160;&#160;&#160;RCC_I2C4CLKSOURCE_SRDPCLK4</td></tr>
<tr class="memitem:ga49995d80cf908c925fb62df0b3516f4d" id="r_ga49995d80cf908c925fb62df0b3516f4d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C4CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_SRDCCIPR_I2C4SEL_0</td></tr>
<tr class="memitem:gab3544835d7916cd3316a12bd1d9a6f11" id="r_gab3544835d7916cd3316a12bd1d9a6f11"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C4CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_SRDCCIPR_I2C4SEL_1</td></tr>
<tr class="memitem:ga7f0a63e050f895a300134900e1b03293" id="r_ga7f0a63e050f895a300134900e1b03293"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_I2C4CLKSOURCE_CSI</b>&#160;&#160;&#160;(RCC_SRDCCIPR_I2C4SEL_0 | RCC_SRDCCIPR_I2C4SEL_1)</td></tr>
<tr class="memitem:ga0703612cc8c099955c74adcbf8ec0aa6" id="r_ga0703612cc8c099955c74adcbf8ec0aa6"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_RNGCLKSOURCE_HSI48</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga600007fdf65479d864fe0144cfbc260f" id="r_ga600007fdf65479d864fe0144cfbc260f"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_RNGCLKSOURCE_PLL</b>&#160;&#160;&#160;RCC_CDCCIP2R_RNGSEL_0</td></tr>
<tr class="memitem:gad24da555a5911627241abc7a76675149" id="r_gad24da555a5911627241abc7a76675149"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_RNGCLKSOURCE_LSE</b>&#160;&#160;&#160;RCC_CDCCIP2R_RNGSEL_1</td></tr>
<tr class="memitem:ga24db3e934cb86dca56b473c253f98dee" id="r_ga24db3e934cb86dca56b473c253f98dee"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_RNGCLKSOURCE_LSI</b>&#160;&#160;&#160;RCC_CDCCIP2R_RNGSEL</td></tr>
<tr class="memitem:ga7c8ae5c57a3a902a17308812ea888cf5" id="r_ga7c8ae5c57a3a902a17308812ea888cf5"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USBCLKSOURCE_PLL</b>&#160;&#160;&#160;RCC_CDCCIP2R_USBSEL_0</td></tr>
<tr class="memitem:ga40ed0e91776c6dab9de2978a30a44190" id="r_ga40ed0e91776c6dab9de2978a30a44190"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USBCLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_CDCCIP2R_USBSEL_1</td></tr>
<tr class="memitem:gab07d0cd905b63a05c953bc6e0daa9982" id="r_gab07d0cd905b63a05c953bc6e0daa9982"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USBCLKSOURCE_HSI48</b>&#160;&#160;&#160;RCC_CDCCIP2R_USBSEL</td></tr>
<tr class="memitem:gae8340f1b05a35966d08c1e547663b3ec" id="r_gae8340f1b05a35966d08c1e547663b3ec"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SAI1CLKSOURCE_PLL</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga1742f4cc98186bc395ad1a03f2dda0ce" id="r_ga1742f4cc98186bc395ad1a03f2dda0ce"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SAI1CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_CDCCIP1R_SAI1SEL_0</td></tr>
<tr class="memitem:gae30dc8fcfbd1d6a20dcd13e224909d85" id="r_gae30dc8fcfbd1d6a20dcd13e224909d85"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SAI1CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_CDCCIP1R_SAI1SEL_1</td></tr>
<tr class="memitem:ga29ce7333b6f1e3430d2ba46b58513ba9" id="r_ga29ce7333b6f1e3430d2ba46b58513ba9"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SAI1CLKSOURCE_PIN</b>&#160;&#160;&#160;(RCC_CDCCIP1R_SAI1SEL_0 | RCC_CDCCIP1R_SAI1SEL_1)</td></tr>
<tr class="memitem:ga11b4d76d667085634f428410fc425425" id="r_ga11b4d76d667085634f428410fc425425"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SAI1CLKSOURCE_CLKP</b>&#160;&#160;&#160;RCC_CDCCIP1R_SAI1SEL_2</td></tr>
<tr class="memitem:gae3bfafad4e86b1af48ed38cdd697e5c9" id="r_gae3bfafad4e86b1af48ed38cdd697e5c9"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI123CLKSOURCE_PLL</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:gaf60b7d0ea15db9a37238dc94ab87f184" id="r_gaf60b7d0ea15db9a37238dc94ab87f184"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI123CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_CDCCIP1R_SPI123SEL_0</td></tr>
<tr class="memitem:gacbadc35126113cb8f1b53c6cc30e58ee" id="r_gacbadc35126113cb8f1b53c6cc30e58ee"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI123CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_CDCCIP1R_SPI123SEL_1</td></tr>
<tr class="memitem:ga0982b4a41a154d3e258fa248223d9747" id="r_ga0982b4a41a154d3e258fa248223d9747"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI123CLKSOURCE_PIN</b>&#160;&#160;&#160;(RCC_CDCCIP1R_SPI123SEL_0 | RCC_CDCCIP1R_SPI123SEL_1)</td></tr>
<tr class="memitem:ga9eef1a3aa0b1e399cbee0a25402aff88" id="r_ga9eef1a3aa0b1e399cbee0a25402aff88"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI123CLKSOURCE_CLKP</b>&#160;&#160;&#160;RCC_CDCCIP1R_SPI123SEL_2</td></tr>
<tr class="memitem:gabbdeb6c96aac75c07b302bae4c6c0b2b" id="r_gabbdeb6c96aac75c07b302bae4c6c0b2b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI1CLKSOURCE_PLL</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_PLL</td></tr>
<tr class="memitem:gaf491e11fcf9e4679e597fd197566d6c6" id="r_gaf491e11fcf9e4679e597fd197566d6c6"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI1CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_PLL2</td></tr>
<tr class="memitem:ga5f0417c75283aff4beb14b1009d068d0" id="r_ga5f0417c75283aff4beb14b1009d068d0"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI1CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_PLL3</td></tr>
<tr class="memitem:gad40a036bb750300c63ffac56f35771f2" id="r_gad40a036bb750300c63ffac56f35771f2"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI1CLKSOURCE_PIN</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_PIN</td></tr>
<tr class="memitem:gac2e7094879a190124fe075d2c91e3bee" id="r_gac2e7094879a190124fe075d2c91e3bee"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI1CLKSOURCE_CLKP</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_CLKP</td></tr>
<tr class="memitem:ga830dbbfc78600cbef232e39318c171f5" id="r_ga830dbbfc78600cbef232e39318c171f5"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI2CLKSOURCE_PLL</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_PLL</td></tr>
<tr class="memitem:ga70a4c3505305bafbc0550604957f8188" id="r_ga70a4c3505305bafbc0550604957f8188"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI2CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_PLL2</td></tr>
<tr class="memitem:ga75d3ff0fa3815f4668aa30c00dc87924" id="r_ga75d3ff0fa3815f4668aa30c00dc87924"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI2CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_PLL3</td></tr>
<tr class="memitem:ga435d41f2ee1f56c85859a1f490ba5544" id="r_ga435d41f2ee1f56c85859a1f490ba5544"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI2CLKSOURCE_PIN</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_PIN</td></tr>
<tr class="memitem:ga02cd3d3506659ece5c05e3b917f5dd1d" id="r_ga02cd3d3506659ece5c05e3b917f5dd1d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI2CLKSOURCE_CLKP</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_CLKP</td></tr>
<tr class="memitem:ga28eb10fd2a3aaa1908d98e842047dca1" id="r_ga28eb10fd2a3aaa1908d98e842047dca1"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI3CLKSOURCE_PLL</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_PLL</td></tr>
<tr class="memitem:ga47f80135cee4c3b26bf5d099b9cecedf" id="r_ga47f80135cee4c3b26bf5d099b9cecedf"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI3CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_PLL2</td></tr>
<tr class="memitem:ga20cff64231c802fb2dc88dd9df16bbe1" id="r_ga20cff64231c802fb2dc88dd9df16bbe1"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI3CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_PLL3</td></tr>
<tr class="memitem:gadeb3dafe4df8cd027201ff60e3e843be" id="r_gadeb3dafe4df8cd027201ff60e3e843be"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI3CLKSOURCE_PIN</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_PIN</td></tr>
<tr class="memitem:ga01f9c4bb736322fb0dba77a5fdfc6453" id="r_ga01f9c4bb736322fb0dba77a5fdfc6453"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI3CLKSOURCE_CLKP</b>&#160;&#160;&#160;RCC_SPI123CLKSOURCE_CLKP</td></tr>
<tr class="memitem:ga6bd9b3db880d3ecf144f405719a59587" id="r_ga6bd9b3db880d3ecf144f405719a59587"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI45CLKSOURCE_CDPCLK2</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga9e769b1348d2be1ff3df0f329b404dc3" id="r_ga9e769b1348d2be1ff3df0f329b404dc3"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI45CLKSOURCE_D2PCLK2</b>&#160;&#160;&#160;RCC_SPI45CLKSOURCE_CDPCLK2  /* D2PCLK2 is used in STM32H74xxx, STM32H75xxx, STM32H72xxx and STM32H73xxx family lines */</td></tr>
<tr class="memitem:ga4caa027337ef565c733464ab9ed642e0" id="r_ga4caa027337ef565c733464ab9ed642e0"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI45CLKSOURCE_PCLK2</b>&#160;&#160;&#160;RCC_SPI45CLKSOURCE_CDPCLK2</td></tr>
<tr class="memitem:ga684ce82d9175bd83580dfa9d317f752a" id="r_ga684ce82d9175bd83580dfa9d317f752a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI45CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_CDCCIP1R_SPI45SEL_0</td></tr>
<tr class="memitem:gaba0a58197b2c104dcf5ff0bc2006f387" id="r_gaba0a58197b2c104dcf5ff0bc2006f387"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI45CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_CDCCIP1R_SPI45SEL_1</td></tr>
<tr class="memitem:gaf093d7e6a5c99e1b2d1dd5243dc2572c" id="r_gaf093d7e6a5c99e1b2d1dd5243dc2572c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI45CLKSOURCE_HSI</b>&#160;&#160;&#160;(RCC_CDCCIP1R_SPI45SEL_0 | RCC_CDCCIP1R_SPI45SEL_1)</td></tr>
<tr class="memitem:gaf4b1d99f669f1640d24e9eaa278c0adb" id="r_gaf4b1d99f669f1640d24e9eaa278c0adb"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI45CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_CDCCIP1R_SPI45SEL_2</td></tr>
<tr class="memitem:ga7e1c696dcae79089756372b5453d11f2" id="r_ga7e1c696dcae79089756372b5453d11f2"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI45CLKSOURCE_HSE</b>&#160;&#160;&#160;(RCC_CDCCIP1R_SPI45SEL_0 | RCC_CDCCIP1R_SPI45SEL_2)</td></tr>
<tr class="memitem:gaa405d52be8b551b9e4985fd37c1bbcc7" id="r_gaa405d52be8b551b9e4985fd37c1bbcc7"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI4CLKSOURCE_D2PCLK2</b>&#160;&#160;&#160;RCC_SPI45CLKSOURCE_D2PCLK2</td></tr>
<tr class="memitem:ga25c68930564e7bff4eebcfbbaeff6a4f" id="r_ga25c68930564e7bff4eebcfbbaeff6a4f"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI4CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_SPI45CLKSOURCE_PLL2</td></tr>
<tr class="memitem:ga5c42e342aef3133d67e4dedd6198f505" id="r_ga5c42e342aef3133d67e4dedd6198f505"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI4CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_SPI45CLKSOURCE_PLL3</td></tr>
<tr class="memitem:ga43a4dc4770be96dd1ea211336e3a67f3" id="r_ga43a4dc4770be96dd1ea211336e3a67f3"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI4CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_SPI45CLKSOURCE_HSI</td></tr>
<tr class="memitem:gadf901663cdaca21890b1732d7e958f03" id="r_gadf901663cdaca21890b1732d7e958f03"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI4CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_SPI45CLKSOURCE_CSI</td></tr>
<tr class="memitem:ga2c12afa3fa5821c9380b4127fdff9694" id="r_ga2c12afa3fa5821c9380b4127fdff9694"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI4CLKSOURCE_HSE</b>&#160;&#160;&#160;RCC_SPI45CLKSOURCE_HSE</td></tr>
<tr class="memitem:ga20a756173b7b0c58dbeee4ffa9b23b21" id="r_ga20a756173b7b0c58dbeee4ffa9b23b21"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI5CLKSOURCE_D2PCLK2</b>&#160;&#160;&#160;RCC_SPI45CLKSOURCE_D2PCLK2</td></tr>
<tr class="memitem:ga36bd498c26c6f90c74f01405249bb261" id="r_ga36bd498c26c6f90c74f01405249bb261"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI5CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_SPI45CLKSOURCE_PLL2</td></tr>
<tr class="memitem:ga24d1fa2e25b5bd4bd80fc79d7cc634ce" id="r_ga24d1fa2e25b5bd4bd80fc79d7cc634ce"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI5CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_SPI45CLKSOURCE_PLL3</td></tr>
<tr class="memitem:ga5535353d402b669caa61b5016dbde7e2" id="r_ga5535353d402b669caa61b5016dbde7e2"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI5CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_SPI45CLKSOURCE_HSI</td></tr>
<tr class="memitem:ga6606c8112fc3a2d8c88efe594d469551" id="r_ga6606c8112fc3a2d8c88efe594d469551"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI5CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_SPI45CLKSOURCE_CSI</td></tr>
<tr class="memitem:gaf00386bbf4f1c994f668cab7ede227fd" id="r_gaf00386bbf4f1c994f668cab7ede227fd"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI5CLKSOURCE_HSE</b>&#160;&#160;&#160;RCC_SPI45CLKSOURCE_HSE</td></tr>
<tr class="memitem:gab9e80287d7c6c553e76e53b11c635833" id="r_gab9e80287d7c6c553e76e53b11c635833"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI6CLKSOURCE_SRDPCLK4</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:gae7a778f5d8451b232aab8e5f0c6b760d" id="r_gae7a778f5d8451b232aab8e5f0c6b760d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI6CLKSOURCE_D3PCLK1</b>&#160;&#160;&#160;RCC_SPI6CLKSOURCE_SRDPCLK4  /* D3PCLK1 is used in STM32H74xxx, STM32H75xxx, STM32H72xxx and STM32H73xxx family lines */</td></tr>
<tr class="memitem:gaaa20d4dd0e235b8bc8a5821c3de090e4" id="r_gaaa20d4dd0e235b8bc8a5821c3de090e4"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI6CLKSOURCE_PCLK4</b>&#160;&#160;&#160;RCC_SPI6CLKSOURCE_SRDPCLK4</td></tr>
<tr class="memitem:ga94283b1603f36abfb1280636d56bdb1d" id="r_ga94283b1603f36abfb1280636d56bdb1d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI6CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_SRDCCIPR_SPI6SEL_0</td></tr>
<tr class="memitem:ga45e773e678525438afb65511204e138b" id="r_ga45e773e678525438afb65511204e138b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI6CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_SRDCCIPR_SPI6SEL_1</td></tr>
<tr class="memitem:gad5f6da243f5ea158b13d4b271cba58e3" id="r_gad5f6da243f5ea158b13d4b271cba58e3"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI6CLKSOURCE_HSI</b>&#160;&#160;&#160;(RCC_SRDCCIPR_SPI6SEL_0 | RCC_SRDCCIPR_SPI6SEL_1)</td></tr>
<tr class="memitem:ga4ce32f7d2f56ac96d6809f18761f16eb" id="r_ga4ce32f7d2f56ac96d6809f18761f16eb"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI6CLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_SRDCCIPR_SPI6SEL_2</td></tr>
<tr class="memitem:ga4b4a6f2025575d875f99c8277f8d918d" id="r_ga4b4a6f2025575d875f99c8277f8d918d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI6CLKSOURCE_HSE</b>&#160;&#160;&#160;(RCC_SRDCCIPR_SPI6SEL_0 | RCC_SRDCCIPR_SPI6SEL_2)</td></tr>
<tr class="memitem:ga0817fa9a51cc40c402b007dbd28f9716" id="r_ga0817fa9a51cc40c402b007dbd28f9716"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPI6CLKSOURCE_PIN</b>&#160;&#160;&#160;(RCC_SRDCCIPR_SPI6SEL_1 | RCC_SRDCCIPR_SPI6SEL_2)</td></tr>
<tr class="memitem:gaa051e1d8fec99b36634148d6da836e66" id="r_gaa051e1d8fec99b36634148d6da836e66"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM1CLKSOURCE_CDPCLK1</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga40cdb170aad26d4c4d0860ad5b35b455" id="r_ga40cdb170aad26d4c4d0860ad5b35b455"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM1CLKSOURCE_PCLK1</b>&#160;&#160;&#160;RCC_LPTIM1CLKSOURCE_CDPCLK1</td></tr>
<tr class="memitem:gab5262974b9d40474e3468e37061b4d5d" id="r_gab5262974b9d40474e3468e37061b4d5d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM1CLKSOURCE_D2PCLK1</b>&#160;&#160;&#160;RCC_LPTIM1CLKSOURCE_CDPCLK1</td></tr>
<tr class="memitem:ga6ca3455b869c90d84216c3880c1d6f96" id="r_ga6ca3455b869c90d84216c3880c1d6f96"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM1CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_CDCCIP2R_LPTIM1SEL_0</td></tr>
<tr class="memitem:ga311e4bbe4859aa8245df3373d58a57c6" id="r_ga311e4bbe4859aa8245df3373d58a57c6"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM1CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_CDCCIP2R_LPTIM1SEL_1</td></tr>
<tr class="memitem:ga6f268c170b61a50711db963c02356874" id="r_ga6f268c170b61a50711db963c02356874"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM1CLKSOURCE_LSE</b>&#160;&#160;&#160;(RCC_CDCCIP2R_LPTIM1SEL_0 | RCC_CDCCIP2R_LPTIM1SEL_1)</td></tr>
<tr class="memitem:gac6dc141d42b90f46a14f6dc653856055" id="r_gac6dc141d42b90f46a14f6dc653856055"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM1CLKSOURCE_LSI</b>&#160;&#160;&#160;RCC_CDCCIP2R_LPTIM1SEL_2</td></tr>
<tr class="memitem:ga165eb3f710b2b499ac0a30beefe75cd8" id="r_ga165eb3f710b2b499ac0a30beefe75cd8"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM1CLKSOURCE_CLKP</b>&#160;&#160;&#160;(RCC_CDCCIP2R_LPTIM1SEL_0 | RCC_CDCCIP2R_LPTIM1SEL_2)</td></tr>
<tr class="memitem:ga86daab11f2a0acc274524e41dfadd3d4" id="r_ga86daab11f2a0acc274524e41dfadd3d4"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM2CLKSOURCE_SRDPCLK4</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:gaf1016f275b7079162b0a2e05db994f41" id="r_gaf1016f275b7079162b0a2e05db994f41"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM2CLKSOURCE_PCLK4</b>&#160;&#160;&#160;RCC_LPTIM2CLKSOURCE_SRDPCLK4</td></tr>
<tr class="memitem:ga4653cd767cc9ee62b3b3877dd8601c7d" id="r_ga4653cd767cc9ee62b3b3877dd8601c7d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM2CLKSOURCE_D3PCLK1</b>&#160;&#160;&#160;RCC_LPTIM2CLKSOURCE_SRDPCLK4</td></tr>
<tr class="memitem:gafcdefe32eb226b5da4dd926e0be9988e" id="r_gafcdefe32eb226b5da4dd926e0be9988e"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM2CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_SRDCCIPR_LPTIM2SEL_0</td></tr>
<tr class="memitem:gae469f5ee473c4f1155deb8259681811a" id="r_gae469f5ee473c4f1155deb8259681811a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM2CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_SRDCCIPR_LPTIM2SEL_1</td></tr>
<tr class="memitem:ga9a2d055b3c47d3ef219b44b2819317e6" id="r_ga9a2d055b3c47d3ef219b44b2819317e6"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM2CLKSOURCE_LSE</b>&#160;&#160;&#160;(RCC_SRDCCIPR_LPTIM2SEL_0 | RCC_SRDCCIPR_LPTIM2SEL_1)</td></tr>
<tr class="memitem:ga56818e296ec1095f2449787e98ae8b56" id="r_ga56818e296ec1095f2449787e98ae8b56"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM2CLKSOURCE_LSI</b>&#160;&#160;&#160;RCC_SRDCCIPR_LPTIM2SEL_2</td></tr>
<tr class="memitem:ga38feddb1bd885729514444662be4af1c" id="r_ga38feddb1bd885729514444662be4af1c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM2CLKSOURCE_CLKP</b>&#160;&#160;&#160;(RCC_SRDCCIPR_LPTIM2SEL_0 | RCC_SRDCCIPR_LPTIM2SEL_2)</td></tr>
<tr class="memitem:ga2dfe3ef4a8c7b0c9c33246322e69c75b" id="r_ga2dfe3ef4a8c7b0c9c33246322e69c75b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM345CLKSOURCE_SRDPCLK4</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga6acceaaeba394660f1aa0ee86aa15241" id="r_ga6acceaaeba394660f1aa0ee86aa15241"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM345CLKSOURCE_PCLK4</b>&#160;&#160;&#160;RCC_LPTIM345CLKSOURCE_SRDPCLK4</td></tr>
<tr class="memitem:gad6f1614c2c4feb2e2de447be81e2dbf9" id="r_gad6f1614c2c4feb2e2de447be81e2dbf9"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM345CLKSOURCE_D3PCLK1</b>&#160;&#160;&#160;RCC_LPTIM345CLKSOURCE_SRDPCLK4</td></tr>
<tr class="memitem:ga0fe567d7f25fbd00c4e44f73551aec54" id="r_ga0fe567d7f25fbd00c4e44f73551aec54"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM345CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_SRDCCIPR_LPTIM3SEL_0</td></tr>
<tr class="memitem:gacde685e1b75dbbf48d1a748570726839" id="r_gacde685e1b75dbbf48d1a748570726839"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM345CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_SRDCCIPR_LPTIM3SEL_1</td></tr>
<tr class="memitem:gaf33b06e2aa3a573a41b01c2b756b37d4" id="r_gaf33b06e2aa3a573a41b01c2b756b37d4"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM345CLKSOURCE_LSE</b>&#160;&#160;&#160;(RCC_SRDCCIPR_LPTIM3SEL_0 | RCC_SRDCCIPR_LPTIM3SEL_1)</td></tr>
<tr class="memitem:gabb27515bd77a38b1bfdd70b8cfd898cf" id="r_gabb27515bd77a38b1bfdd70b8cfd898cf"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM345CLKSOURCE_LSI</b>&#160;&#160;&#160;RCC_SRDCCIPR_LPTIM3SEL_2</td></tr>
<tr class="memitem:ga27fa9259d71f31f4683942fba08ff759" id="r_ga27fa9259d71f31f4683942fba08ff759"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM345CLKSOURCE_CLKP</b>&#160;&#160;&#160;(RCC_SRDCCIPR_LPTIM3SEL_0 | RCC_SRDCCIPR_LPTIM3SEL_2)</td></tr>
<tr class="memitem:gaf56341ef4b9db0609376450fb2c72e56" id="r_gaf56341ef4b9db0609376450fb2c72e56"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM3CLKSOURCE_D3PCLK1</b>&#160;&#160;&#160;RCC_LPTIM345CLKSOURCE_D3PCLK1</td></tr>
<tr class="memitem:ga9778147f948a644448cbff3613800667" id="r_ga9778147f948a644448cbff3613800667"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM3CLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_LPTIM345CLKSOURCE_PLL2</td></tr>
<tr class="memitem:gad4c8f58ef62ca7b081e31833dfebe445" id="r_gad4c8f58ef62ca7b081e31833dfebe445"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM3CLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_LPTIM345CLKSOURCE_PLL3</td></tr>
<tr class="memitem:ga3d5e174bdf6bfd62f422ce03c02f07f4" id="r_ga3d5e174bdf6bfd62f422ce03c02f07f4"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM3CLKSOURCE_LSE</b>&#160;&#160;&#160;RCC_LPTIM345CLKSOURCE_LSE</td></tr>
<tr class="memitem:ga5f381755e2436c4e6f38f3932459bc3a" id="r_ga5f381755e2436c4e6f38f3932459bc3a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM3CLKSOURCE_LSI</b>&#160;&#160;&#160;RCC_LPTIM345CLKSOURCE_LSI</td></tr>
<tr class="memitem:ga5af3cf60886cd5aa1bdc050a44716075" id="r_ga5af3cf60886cd5aa1bdc050a44716075"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM3CLKSOURCE_CLKP</b>&#160;&#160;&#160;RCC_LPTIM345CLKSOURCE_CLKP</td></tr>
<tr class="memitem:gaeffb23a1e9ce8f57e20d57a11b9287c6" id="r_gaeffb23a1e9ce8f57e20d57a11b9287c6"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_FMCCLKSOURCE_CDHCLK</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga085b4b556406e730d282dce7f1c52d2d" id="r_ga085b4b556406e730d282dce7f1c52d2d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_FMCCLKSOURCE_HCLK</b>&#160;&#160;&#160;RCC_FMCCLKSOURCE_CDHCLK</td></tr>
<tr class="memitem:ga255c2eb80c846e39484fa20fba27dae4" id="r_ga255c2eb80c846e39484fa20fba27dae4"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_FMCCLKSOURCE_D1HCLK</b>&#160;&#160;&#160;RCC_FMCCLKSOURCE_CDHCLK</td></tr>
<tr class="memitem:ga26391adaa79f6b0b9c1c19b7695a1e7a" id="r_ga26391adaa79f6b0b9c1c19b7695a1e7a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_FMCCLKSOURCE_PLL</b>&#160;&#160;&#160;RCC_CDCCIPR_FMCSEL_0</td></tr>
<tr class="memitem:ga5e5fd7651f33d60b2e5b35304cc961aa" id="r_ga5e5fd7651f33d60b2e5b35304cc961aa"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_FMCCLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_CDCCIPR_FMCSEL_1</td></tr>
<tr class="memitem:ga972dfd4c24f32884f3c076e59f76f813" id="r_ga972dfd4c24f32884f3c076e59f76f813"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_FMCCLKSOURCE_CLKP</b>&#160;&#160;&#160;RCC_CDCCIPR_FMCSEL</td></tr>
<tr class="memitem:gaaab8c67bd3171f5720a48e29e1ce333f" id="r_gaaab8c67bd3171f5720a48e29e1ce333f"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SDMMCCLKSOURCE_PLL</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:gabe4c50e2db93d96799b205aedf8a9725" id="r_gabe4c50e2db93d96799b205aedf8a9725"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SDMMCCLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_CDCCIPR_SDMMCSEL</td></tr>
<tr class="memitem:gaac8951308d2abaed9daa4f596d092dd5" id="r_gaac8951308d2abaed9daa4f596d092dd5"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_ADCCLKSOURCE_PLL2</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:gad05173624318bceb82c54ccc3698dbf8" id="r_gad05173624318bceb82c54ccc3698dbf8"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_ADCCLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_SRDCCIPR_ADCSEL_0</td></tr>
<tr class="memitem:ga1ba73db5320d6e04b2cc4e3e9bfa6553" id="r_ga1ba73db5320d6e04b2cc4e3e9bfa6553"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_ADCCLKSOURCE_CLKP</b>&#160;&#160;&#160;RCC_SRDCCIPR_ADCSEL_1</td></tr>
<tr class="memitem:gacf11b760c1c02115b5d7fa3d048e6b97" id="r_gacf11b760c1c02115b5d7fa3d048e6b97"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SWPMI1CLKSOURCE_CDPCLK1</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga443403483f828ee5b4e99dfccdc568b3" id="r_ga443403483f828ee5b4e99dfccdc568b3"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SWPMI1CLKSOURCE_D2PCLK1</b>&#160;&#160;&#160;RCC_SWPMI1CLKSOURCE_CDPCLK1</td></tr>
<tr class="memitem:gaa52742d968a6df963a3569f10c15e473" id="r_gaa52742d968a6df963a3569f10c15e473"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SWPMI1CLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_CDCCIP1R_SWPSEL</td></tr>
<tr class="memitem:ga5104f1d62b8cfb3a556b41413639508b" id="r_ga5104f1d62b8cfb3a556b41413639508b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_DFSDM1CLKSOURCE_CDPCLK1</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga2738e96508edef57f6ff04727107027a" id="r_ga2738e96508edef57f6ff04727107027a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_DFSDM1CLKSOURCE_D2PCLK1</b>&#160;&#160;&#160;RCC_DFSDM1CLKSOURCE_CDPCLK1</td></tr>
<tr class="memitem:ga3947fcf319a8d9cc1324b72ae30d0b59" id="r_ga3947fcf319a8d9cc1324b72ae30d0b59"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_DFSDM1CLKSOURCE_SYS</b>&#160;&#160;&#160;RCC_CDCCIP1R_DFSDM1SEL</td></tr>
<tr class="memitem:ga17e49b2294631b11bce86f698e359484" id="r_ga17e49b2294631b11bce86f698e359484"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPDIFRXCLKSOURCE_PLL</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga7d55b4b50c422af002ac3080469986a4" id="r_ga7d55b4b50c422af002ac3080469986a4"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPDIFRXCLKSOURCE_PLL2</b>&#160;&#160;&#160;RCC_CDCCIP1R_SPDIFSEL_0</td></tr>
<tr class="memitem:gacb3279fa03f70c59133e7c10da4f2ee8" id="r_gacb3279fa03f70c59133e7c10da4f2ee8"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPDIFRXCLKSOURCE_PLL3</b>&#160;&#160;&#160;RCC_CDCCIP1R_SPDIFSEL_1</td></tr>
<tr class="memitem:ga28acdd60100e01c45556d8a5903736c5" id="r_ga28acdd60100e01c45556d8a5903736c5"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SPDIFRXCLKSOURCE_HSI</b>&#160;&#160;&#160;RCC_CDCCIP1R_SPDIFSEL</td></tr>
<tr class="memitem:ga0ce76c7cbd6575550c7dc4d9397d934a" id="r_ga0ce76c7cbd6575550c7dc4d9397d934a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CECCLKSOURCE_LSE</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:gaf9139132a0acc3f1b2e15ecac00f7fa1" id="r_gaf9139132a0acc3f1b2e15ecac00f7fa1"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CECCLKSOURCE_LSI</b>&#160;&#160;&#160;RCC_CDCCIP2R_CECSEL_0</td></tr>
<tr class="memitem:gaedd8021a62f8fc6015fa756abfbbb83c" id="r_gaedd8021a62f8fc6015fa756abfbbb83c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CECCLKSOURCE_CSI</b>&#160;&#160;&#160;RCC_CDCCIP2R_CECSEL_1</td></tr>
<tr class="memitem:ga931812906ad59e0f5ff675063888c2a3" id="r_ga931812906ad59e0f5ff675063888c2a3"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CLKPSOURCE_HSI</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga7010519d2a24e177d73354af81eff627" id="r_ga7010519d2a24e177d73354af81eff627"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CLKPSOURCE_CSI</b>&#160;&#160;&#160;RCC_CDCCIPR_CKPERSEL_0</td></tr>
<tr class="memitem:gace3d6bfba43dc6ccd64a1ea3e66a7f1a" id="r_gace3d6bfba43dc6ccd64a1ea3e66a7f1a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CLKPSOURCE_HSE</b>&#160;&#160;&#160;RCC_CDCCIPR_CKPERSEL_1</td></tr>
<tr class="memitem:ga8151264a427f3eec6e6b641b8bbcbafa" id="r_ga8151264a427f3eec6e6b641b8bbcbafa"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_TIMPRES_DESACTIVATED</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:gae93dc9065111c8aa0e44c30dacc38536" id="r_gae93dc9065111c8aa0e44c30dacc38536"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_TIMPRES_ACTIVATED</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga6d6448d5ee420f8cc87b22b1201f5be2">RCC_CFGR_TIMPRE</a></td></tr>
<tr class="memitem:ga78003cb53700307afc05ee44e07c7ecb" id="r_ga78003cb53700307afc05ee44e07c7ecb"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_WWDG1</b>&#160;&#160;&#160;RCC_GCR_WW1RSC</td></tr>
<tr class="memitem:ga9b28da23df63fe2a235536edd669d8e9" id="r_ga9b28da23df63fe2a235536edd669d8e9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___e_x_t_i___l_i_n_e___l_s_e_c_s_s.html#ga9b28da23df63fe2a235536edd669d8e9">RCC_EXTI_LINE_LSECSS</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga226e1af2518349964010b359a27dea2e">EXTI_IMR1_IM18</a></td></tr>
<tr class="memitem:ga2ccbdb370beb2773f46e0b06c9ab648d" id="r_ga2ccbdb370beb2773f46e0b06c9ab648d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CRS_NONE</b>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga75d32f733245dcf68f24b0f5eea7d0fc" id="r_ga75d32f733245dcf68f24b0f5eea7d0fc"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CRS_TIMEOUT</b>&#160;&#160;&#160;(0x00000001U)</td></tr>
<tr class="memitem:ga504077e15ea9710a0ae89b4fe45492e6" id="r_ga504077e15ea9710a0ae89b4fe45492e6"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CRS_SYNCOK</b>&#160;&#160;&#160;(0x00000002U)</td></tr>
<tr class="memitem:ga1efe7a0a04d56b56f3f5231b8f554258" id="r_ga1efe7a0a04d56b56f3f5231b8f554258"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CRS_SYNCWARN</b>&#160;&#160;&#160;(0x00000004U)</td></tr>
<tr class="memitem:ga2768c937149c68dc19d03adcef1afb99" id="r_ga2768c937149c68dc19d03adcef1afb99"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CRS_SYNCERR</b>&#160;&#160;&#160;(0x00000008U)</td></tr>
<tr class="memitem:ga76117c3ea462c88bf6cd3a0ff37a8c31" id="r_ga76117c3ea462c88bf6cd3a0ff37a8c31"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CRS_SYNCMISS</b>&#160;&#160;&#160;(0x00000010U)</td></tr>
<tr class="memitem:ga3b8442b9afa0823a03695ad813c3277c" id="r_ga3b8442b9afa0823a03695ad813c3277c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CRS_TRIMOVF</b>&#160;&#160;&#160;(0x00000020U)</td></tr>
<tr class="memitem:ga92286a7b70051d3ad899b3b4cf7c9840" id="r_ga92286a7b70051d3ad899b3b4cf7c9840"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___synchro_source.html#ga92286a7b70051d3ad899b3b4cf7c9840">RCC_CRS_SYNC_SOURCE_PIN</a>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:gaacd7c7d911ef1228fbc7ac4533527026" id="r_gaacd7c7d911ef1228fbc7ac4533527026"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___synchro_source.html#gaacd7c7d911ef1228fbc7ac4533527026">RCC_CRS_SYNC_SOURCE_LSE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga85cd0182bf6bbb7088991ff04c612e20">CRS_CFGR_SYNCSRC_0</a></td></tr>
<tr class="memitem:ga6c53c1d29bb18033c5514f28f2cf9ef8" id="r_ga6c53c1d29bb18033c5514f28f2cf9ef8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___synchro_source.html#ga6c53c1d29bb18033c5514f28f2cf9ef8">RCC_CRS_SYNC_SOURCE_USB1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab2d2f4200ea8754386aab5947b40721d">CRS_CFGR_SYNCSRC_1</a></td></tr>
<tr class="memitem:ga427f17635c19200b4aeadb4b5a8040ab" id="r_ga427f17635c19200b4aeadb4b5a8040ab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___synchro_source.html#ga427f17635c19200b4aeadb4b5a8040ab">RCC_CRS_SYNC_SOURCE_USB2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gab2d2f4200ea8754386aab5947b40721d">CRS_CFGR_SYNCSRC_1</a>|<a class="el" href="group___peripheral___registers___bits___definition.html#ga85cd0182bf6bbb7088991ff04c612e20">CRS_CFGR_SYNCSRC_0</a>)</td></tr>
<tr class="memitem:ga60aae5d8cd38a3ace894df002aa14a14" id="r_ga60aae5d8cd38a3ace894df002aa14a14"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___synchro_divider.html#ga60aae5d8cd38a3ace894df002aa14a14">RCC_CRS_SYNC_DIV1</a>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga2f75c52f4ac93c112c8bb76943ed7ccc" id="r_ga2f75c52f4ac93c112c8bb76943ed7ccc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___synchro_divider.html#ga2f75c52f4ac93c112c8bb76943ed7ccc">RCC_CRS_SYNC_DIV2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga386136633d2d7330e0ac5ca183c292de">CRS_CFGR_SYNCDIV_0</a></td></tr>
<tr class="memitem:gacd65fae74865d415912220f0db616f56" id="r_gacd65fae74865d415912220f0db616f56"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___synchro_divider.html#gacd65fae74865d415912220f0db616f56">RCC_CRS_SYNC_DIV4</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae595c852cabc78e8bc9055625d68ca54">CRS_CFGR_SYNCDIV_1</a></td></tr>
<tr class="memitem:gad2bd5dac3b5d22a86bc3c8d9a355768a" id="r_gad2bd5dac3b5d22a86bc3c8d9a355768a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___synchro_divider.html#gad2bd5dac3b5d22a86bc3c8d9a355768a">RCC_CRS_SYNC_DIV8</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gae595c852cabc78e8bc9055625d68ca54">CRS_CFGR_SYNCDIV_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga386136633d2d7330e0ac5ca183c292de">CRS_CFGR_SYNCDIV_0</a>)</td></tr>
<tr class="memitem:ga6f30090710f3722cc59e7b7d4c079781" id="r_ga6f30090710f3722cc59e7b7d4c079781"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___synchro_divider.html#ga6f30090710f3722cc59e7b7d4c079781">RCC_CRS_SYNC_DIV16</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaa7a4d4b65dbf3623f93cf14ed953fd42">CRS_CFGR_SYNCDIV_2</a></td></tr>
<tr class="memitem:ga1c41b5ff0a49c91a3bdf281273d22618" id="r_ga1c41b5ff0a49c91a3bdf281273d22618"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___synchro_divider.html#ga1c41b5ff0a49c91a3bdf281273d22618">RCC_CRS_SYNC_DIV32</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaa7a4d4b65dbf3623f93cf14ed953fd42">CRS_CFGR_SYNCDIV_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga386136633d2d7330e0ac5ca183c292de">CRS_CFGR_SYNCDIV_0</a>)</td></tr>
<tr class="memitem:gad5d81304197848a0f790cf52ad3280d8" id="r_gad5d81304197848a0f790cf52ad3280d8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___synchro_divider.html#gad5d81304197848a0f790cf52ad3280d8">RCC_CRS_SYNC_DIV64</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaa7a4d4b65dbf3623f93cf14ed953fd42">CRS_CFGR_SYNCDIV_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gae595c852cabc78e8bc9055625d68ca54">CRS_CFGR_SYNCDIV_1</a>)</td></tr>
<tr class="memitem:ga10c555a684def76ffe90d24070a3216b" id="r_ga10c555a684def76ffe90d24070a3216b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___synchro_divider.html#ga10c555a684def76ffe90d24070a3216b">RCC_CRS_SYNC_DIV128</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad0b3ee2ab042802997e57d788c640647">CRS_CFGR_SYNCDIV</a></td></tr>
<tr class="memitem:ga06b110dba008269ae6d62c2804d7ccc2" id="r_ga06b110dba008269ae6d62c2804d7ccc2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___synchro_polarity.html#ga06b110dba008269ae6d62c2804d7ccc2">RCC_CRS_SYNC_POLARITY_RISING</a>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga83df3c5d82e29fccb0a3b2bb6541972b" id="r_ga83df3c5d82e29fccb0a3b2bb6541972b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___synchro_polarity.html#ga83df3c5d82e29fccb0a3b2bb6541972b">RCC_CRS_SYNC_POLARITY_FALLING</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab28395cefb0927f2118a9a840a2e2d71">CRS_CFGR_SYNCPOL</a></td></tr>
<tr class="memitem:ga72fb36e52e566983f29bd38a4c828475" id="r_ga72fb36e52e566983f29bd38a4c828475"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___reload_value_default.html#ga72fb36e52e566983f29bd38a4c828475">RCC_CRS_RELOADVALUE_DEFAULT</a>&#160;&#160;&#160;(0x0000BB7FU)</td></tr>
<tr class="memitem:ga7a53a407ed3b83f549a6b164092406db" id="r_ga7a53a407ed3b83f549a6b164092406db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___error_limit_default.html#ga7a53a407ed3b83f549a6b164092406db">RCC_CRS_ERRORLIMIT_DEFAULT</a>&#160;&#160;&#160;(0x00000022U)</td></tr>
<tr class="memitem:ga04131515a55d3cc641bcec970f84e1a8" id="r_ga04131515a55d3cc641bcec970f84e1a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___h_s_i48_calibration_default.html#ga04131515a55d3cc641bcec970f84e1a8">RCC_CRS_HSI48CALIBRATION_DEFAULT</a>&#160;&#160;&#160;(0x00000020U)</td></tr>
<tr class="memitem:ga7e7eefdcd81e04c21e86f21e01d38f1d" id="r_ga7e7eefdcd81e04c21e86f21e01d38f1d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___freq_error_direction.html#ga7e7eefdcd81e04c21e86f21e01d38f1d">RCC_CRS_FREQERRORDIR_UP</a>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:gacb5696af29dd680a7250f31c20ab8d64" id="r_gacb5696af29dd680a7250f31c20ab8d64"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___freq_error_direction.html#gacb5696af29dd680a7250f31c20ab8d64">RCC_CRS_FREQERRORDIR_DOWN</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga91196b059d8ff52c4f28bc964c8a446a">CRS_ISR_FEDIR</a>)</td></tr>
<tr class="memitem:ga772a7eb77eaea0622fb3e3b20275a37f" id="r_ga772a7eb77eaea0622fb3e3b20275a37f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___interrupt___sources.html#ga772a7eb77eaea0622fb3e3b20275a37f">RCC_CRS_IT_SYNCOK</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga246a4b3d840b5b9a18f6ea414fc48297">CRS_CR_SYNCOKIE</a></td></tr>
<tr class="memitem:ga8b9e2cbfa3fd8d7c18f81685c24a394f" id="r_ga8b9e2cbfa3fd8d7c18f81685c24a394f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___interrupt___sources.html#ga8b9e2cbfa3fd8d7c18f81685c24a394f">RCC_CRS_IT_SYNCWARN</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac27fb8e1741d3b5c19a527955eb00bad">CRS_CR_SYNCWARNIE</a></td></tr>
<tr class="memitem:ga01a198f277ff33e6fd5a9c2a6ad908b9" id="r_ga01a198f277ff33e6fd5a9c2a6ad908b9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___interrupt___sources.html#ga01a198f277ff33e6fd5a9c2a6ad908b9">RCC_CRS_IT_ERR</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac616bbfe903ec7cc2be289db5fba0fe5">CRS_CR_ERRIE</a></td></tr>
<tr class="memitem:gadf2de3907d21dfaea6b2444d66adfe13" id="r_gadf2de3907d21dfaea6b2444d66adfe13"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___interrupt___sources.html#gadf2de3907d21dfaea6b2444d66adfe13">RCC_CRS_IT_ESYNC</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga3831818c762e279f698faf27f4e7db4a">CRS_CR_ESYNCIE</a></td></tr>
<tr class="memitem:gaf464654bbdfda5b86982fc4aa5b5a031" id="r_gaf464654bbdfda5b86982fc4aa5b5a031"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___interrupt___sources.html#gaf464654bbdfda5b86982fc4aa5b5a031">RCC_CRS_IT_SYNCERR</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac616bbfe903ec7cc2be289db5fba0fe5">CRS_CR_ERRIE</a></td></tr>
<tr class="memitem:gac6b25a96e779b2f7ee3223101109ee33" id="r_gac6b25a96e779b2f7ee3223101109ee33"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___interrupt___sources.html#gac6b25a96e779b2f7ee3223101109ee33">RCC_CRS_IT_SYNCMISS</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac616bbfe903ec7cc2be289db5fba0fe5">CRS_CR_ERRIE</a></td></tr>
<tr class="memitem:ga031f913312b8af1f38dc7c5adcd716f1" id="r_ga031f913312b8af1f38dc7c5adcd716f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___interrupt___sources.html#ga031f913312b8af1f38dc7c5adcd716f1">RCC_CRS_IT_TRIMOVF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac616bbfe903ec7cc2be289db5fba0fe5">CRS_CR_ERRIE</a></td></tr>
<tr class="memitem:ga27e1ae14c7854ca42faf5379bea5ac39" id="r_ga27e1ae14c7854ca42faf5379bea5ac39"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___flags.html#ga27e1ae14c7854ca42faf5379bea5ac39">RCC_CRS_FLAG_SYNCOK</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae0a9b5f8992ead0ad76fbb08a5e32419">CRS_ISR_SYNCOKF</a></td></tr>
<tr class="memitem:ga244c3ca47b8099a79212ab10d8e823c9" id="r_ga244c3ca47b8099a79212ab10d8e823c9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___flags.html#ga244c3ca47b8099a79212ab10d8e823c9">RCC_CRS_FLAG_SYNCWARN</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga0f33a79fec47400ab363bbf5b4b9f2b5">CRS_ISR_SYNCWARNF</a></td></tr>
<tr class="memitem:ga92be7705ece62c427a262355305527fa" id="r_ga92be7705ece62c427a262355305527fa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___flags.html#ga92be7705ece62c427a262355305527fa">RCC_CRS_FLAG_ERR</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga963b451a4ca8890ee3d323304f0b9298">CRS_ISR_ERRF</a></td></tr>
<tr class="memitem:ga10697d7c12b710c52c26db522c11986b" id="r_ga10697d7c12b710c52c26db522c11986b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___flags.html#ga10697d7c12b710c52c26db522c11986b">RCC_CRS_FLAG_ESYNC</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga819c4d424be7915f9660ecb19c234a8f">CRS_ISR_ESYNCF</a></td></tr>
<tr class="memitem:gad49f59e34225920835b69a34f1b4c02b" id="r_gad49f59e34225920835b69a34f1b4c02b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___flags.html#gad49f59e34225920835b69a34f1b4c02b">RCC_CRS_FLAG_SYNCERR</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga80d05ae1142788a65444c0463a26bcfb">CRS_ISR_SYNCERR</a></td></tr>
<tr class="memitem:ga78549e9f343ad843d6e5d45b4e08433c" id="r_ga78549e9f343ad843d6e5d45b4e08433c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___flags.html#ga78549e9f343ad843d6e5d45b4e08433c">RCC_CRS_FLAG_SYNCMISS</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga9f2241bd51b436f7b381ad410124aec5">CRS_ISR_SYNCMISS</a></td></tr>
<tr class="memitem:ga4c4c324494f9c6469e53d225242c73d4" id="r_ga4c4c324494f9c6469e53d225242c73d4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___flags.html#ga4c4c324494f9c6469e53d225242c73d4">RCC_CRS_FLAG_TRIMOVF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf3852f10eb46159b7888c71e6d9cec3b">CRS_ISR_TRIMOVF</a></td></tr>
<tr class="memitem:gacc1a8ad328f57e3dcade01e5355e0add" id="r_gacc1a8ad328f57e3dcade01e5355e0add"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gacc1a8ad328f57e3dcade01e5355e0add">__HAL_RCC_PLL2_ENABLE</a>()</td></tr>
<tr class="memdesc:gacc1a8ad328f57e3dcade01e5355e0add"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macros to enable or disable PLL2.  <br /></td></tr>
<tr class="memitem:ga1e44121d27a8d6096c170d4a2e7c1981" id="r_ga1e44121d27a8d6096c170d4a2e7c1981"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga1e44121d27a8d6096c170d4a2e7c1981">__HAL_RCC_PLL2_DISABLE</a>()</td></tr>
<tr class="memitem:gadee20de14af30b0f958fda51d852066b" id="r_gadee20de14af30b0f958fda51d852066b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gadee20de14af30b0f958fda51d852066b">__HAL_RCC_PLL2CLKOUT_ENABLE</a>(__RCC_PLL2ClockOut__)</td></tr>
<tr class="memdesc:gadee20de14af30b0f958fda51d852066b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables or disables each clock output (PLL2_P_CLK, PLL2_Q_CLK, PLL2_R_CLK)  <br /></td></tr>
<tr class="memitem:ga20869ea15ad0f090d4e3fcc217242474" id="r_ga20869ea15ad0f090d4e3fcc217242474"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga20869ea15ad0f090d4e3fcc217242474">__HAL_RCC_PLL2CLKOUT_DISABLE</a>(__RCC_PLL2ClockOut__)</td></tr>
<tr class="memitem:ga25e0f4d0ef5f525a3c0c5c0a155d0ac6" id="r_ga25e0f4d0ef5f525a3c0c5c0a155d0ac6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga25e0f4d0ef5f525a3c0c5c0a155d0ac6">__HAL_RCC_PLL2FRACN_ENABLE</a>()</td></tr>
<tr class="memdesc:ga25e0f4d0ef5f525a3c0c5c0a155d0ac6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables or disables Fractional Part Of The Multiplication Factor of PLL2 VCO.  <br /></td></tr>
<tr class="memitem:ga320b2becbdbe9830622f1b96526a5d7b" id="r_ga320b2becbdbe9830622f1b96526a5d7b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga320b2becbdbe9830622f1b96526a5d7b">__HAL_RCC_PLL2FRACN_DISABLE</a>()</td></tr>
<tr class="memitem:ga1b17f7d45a505cc6acce76a1a80d9aca" id="r_ga1b17f7d45a505cc6acce76a1a80d9aca"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga1b17f7d45a505cc6acce76a1a80d9aca">__HAL_RCC_PLL2_CONFIG</a>(__PLL2M__,  __PLL2N__,  __PLL2P__,  __PLL2Q__,  __PLL2R__)</td></tr>
<tr class="memdesc:ga1b17f7d45a505cc6acce76a1a80d9aca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to configures the PLL2 multiplication and division factors.  <br /></td></tr>
<tr class="memitem:gac2cb75d60618ffea824634490f9d81eb" id="r_gac2cb75d60618ffea824634490f9d81eb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gac2cb75d60618ffea824634490f9d81eb">__HAL_RCC_PLL2FRACN_CONFIG</a>(__RCC_PLL2FRACN__)</td></tr>
<tr class="memdesc:gac2cb75d60618ffea824634490f9d81eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to configures PLL2 clock Fractional Part Of The Multiplication Factor.  <br /></td></tr>
<tr class="memitem:ga88d12a5c64e4a820268b9f7f50d74179" id="r_ga88d12a5c64e4a820268b9f7f50d74179"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga88d12a5c64e4a820268b9f7f50d74179">__HAL_RCC_PLL2_VCIRANGE</a>(__RCC_PLL2VCIRange__)</td></tr>
<tr class="memdesc:ga88d12a5c64e4a820268b9f7f50d74179"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to select the PLL2 reference frequency range.  <br /></td></tr>
<tr class="memitem:ga5b448c0dab856525467ba9146db00432" id="r_ga5b448c0dab856525467ba9146db00432"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga5b448c0dab856525467ba9146db00432">__HAL_RCC_PLL2_VCORANGE</a>(__RCC_PLL2VCORange__)</td></tr>
<tr class="memdesc:ga5b448c0dab856525467ba9146db00432"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to select the PLL2 reference frequency range.  <br /></td></tr>
<tr class="memitem:gac7c3a26323f470a939b021ad76f29518" id="r_gac7c3a26323f470a939b021ad76f29518"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gac7c3a26323f470a939b021ad76f29518">__HAL_RCC_PLL3_ENABLE</a>()</td></tr>
<tr class="memdesc:gac7c3a26323f470a939b021ad76f29518"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macros to enable or disable the main PLL3.  <br /></td></tr>
<tr class="memitem:ga9eccd5f7fbfd12da15ba7d76d9a21d18" id="r_ga9eccd5f7fbfd12da15ba7d76d9a21d18"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga9eccd5f7fbfd12da15ba7d76d9a21d18">__HAL_RCC_PLL3_DISABLE</a>()</td></tr>
<tr class="memitem:ga35af940f02bf692f69ca9cf2dd598f24" id="r_ga35af940f02bf692f69ca9cf2dd598f24"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga35af940f02bf692f69ca9cf2dd598f24">__HAL_RCC_PLL3FRACN_ENABLE</a>()</td></tr>
<tr class="memdesc:ga35af940f02bf692f69ca9cf2dd598f24"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables or disables Fractional Part Of The Multiplication Factor of PLL3 VCO.  <br /></td></tr>
<tr class="memitem:ga4a2fb65aefcf9fd35d55a5de8000173e" id="r_ga4a2fb65aefcf9fd35d55a5de8000173e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga4a2fb65aefcf9fd35d55a5de8000173e">__HAL_RCC_PLL3FRACN_DISABLE</a>()</td></tr>
<tr class="memitem:ga44dba3c4e64245e760eb3e780096b4da" id="r_ga44dba3c4e64245e760eb3e780096b4da"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga44dba3c4e64245e760eb3e780096b4da">__HAL_RCC_PLL3CLKOUT_ENABLE</a>(__RCC_PLL3ClockOut__)</td></tr>
<tr class="memdesc:ga44dba3c4e64245e760eb3e780096b4da"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables or disables each clock output (PLL3_P_CLK, PLL3_Q_CLK, PLL3_R_CLK)  <br /></td></tr>
<tr class="memitem:ga36d6e5c5786cab7644e5149d00f704c3" id="r_ga36d6e5c5786cab7644e5149d00f704c3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga36d6e5c5786cab7644e5149d00f704c3">__HAL_RCC_PLL3CLKOUT_DISABLE</a>(__RCC_PLL3ClockOut__)</td></tr>
<tr class="memitem:gac5020a08025c53436a32d77640786d5d" id="r_gac5020a08025c53436a32d77640786d5d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gac5020a08025c53436a32d77640786d5d">__HAL_RCC_PLL3_CONFIG</a>(__PLL3M__,  __PLL3N__,  __PLL3P__,  __PLL3Q__,  __PLL3R__)</td></tr>
<tr class="memdesc:gac5020a08025c53436a32d77640786d5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to configures the PLL3 multiplication and division factors.  <br /></td></tr>
<tr class="memitem:ga3c6bb3051b93d8f3051ace7b1611c5c1" id="r_ga3c6bb3051b93d8f3051ace7b1611c5c1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga3c6bb3051b93d8f3051ace7b1611c5c1">__HAL_RCC_PLL3FRACN_CONFIG</a>(__RCC_PLL3FRACN__)</td></tr>
<tr class="memdesc:ga3c6bb3051b93d8f3051ace7b1611c5c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to configures PLL3 clock Fractional Part of The Multiplication Factor.  <br /></td></tr>
<tr class="memitem:ga5825c7707fdbf1432a215fbf3ef4b766" id="r_ga5825c7707fdbf1432a215fbf3ef4b766"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga5825c7707fdbf1432a215fbf3ef4b766">__HAL_RCC_PLL3_VCIRANGE</a>(__RCC_PLL3VCIRange__)</td></tr>
<tr class="memdesc:ga5825c7707fdbf1432a215fbf3ef4b766"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to select the PLL3 reference frequency range.  <br /></td></tr>
<tr class="memitem:ga7c53c8f29406ecd9c45434db4b2af32d" id="r_ga7c53c8f29406ecd9c45434db4b2af32d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga7c53c8f29406ecd9c45434db4b2af32d">__HAL_RCC_PLL3_VCORANGE</a>(__RCC_PLL3VCORange__)</td></tr>
<tr class="memdesc:ga7c53c8f29406ecd9c45434db4b2af32d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to select the PLL3 reference frequency range.  <br /></td></tr>
<tr class="memitem:ga0c98df7eb7d710df2bf05427a4a10bc7" id="r_ga0c98df7eb7d710df2bf05427a4a10bc7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga0c98df7eb7d710df2bf05427a4a10bc7">__HAL_RCC_SAI1_CONFIG</a>(__RCC_SAI1CLKSource__)</td></tr>
<tr class="memdesc:ga0c98df7eb7d710df2bf05427a4a10bc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to Configure the SAI1 clock source.  <br /></td></tr>
<tr class="memitem:ga9af45dae7c2f2f1c8848be68d7bded7e" id="r_ga9af45dae7c2f2f1c8848be68d7bded7e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga9af45dae7c2f2f1c8848be68d7bded7e">__HAL_RCC_GET_SAI1_SOURCE</a>()</td></tr>
<tr class="memdesc:ga9af45dae7c2f2f1c8848be68d7bded7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the SAI1 clock source.  <br /></td></tr>
<tr class="memitem:ga6cf17efbf8f472437732901308320283" id="r_ga6cf17efbf8f472437732901308320283"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga6cf17efbf8f472437732901308320283">__HAL_RCC_SPDIFRX_CONFIG</a>(__RCC_SPDIFCLKSource__)</td></tr>
<tr class="memdesc:ga6cf17efbf8f472437732901308320283"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to Configure the SPDIFRX clock source.  <br /></td></tr>
<tr class="memitem:gad3ddc626288e3b401da0b8547f2ac0d3" id="r_gad3ddc626288e3b401da0b8547f2ac0d3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gad3ddc626288e3b401da0b8547f2ac0d3">__HAL_RCC_GET_SPDIFRX_SOURCE</a>()</td></tr>
<tr class="memdesc:gad3ddc626288e3b401da0b8547f2ac0d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the SPDIFRX clock source.  <br /></td></tr>
<tr class="memitem:gafd775b802b35eddc3763819b696c8dc6" id="r_gafd775b802b35eddc3763819b696c8dc6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gafd775b802b35eddc3763819b696c8dc6">__HAL_RCC_I2C1235_CONFIG</a>(__I2C1235CLKSource__)</td></tr>
<tr class="memdesc:gafd775b802b35eddc3763819b696c8dc6"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the I2C1/2/3/5* clock (I2C123CLK).  <br /></td></tr>
<tr class="memitem:ga1c11406787c87ef39597619fae00bd88" id="r_ga1c11406787c87ef39597619fae00bd88"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_I2C123_CONFIG</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#gafd775b802b35eddc3763819b696c8dc6">__HAL_RCC_I2C1235_CONFIG</a></td></tr>
<tr class="memitem:ga18d44d4471dc6940cdfa9ee4ad4025d3" id="r_ga18d44d4471dc6940cdfa9ee4ad4025d3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga18d44d4471dc6940cdfa9ee4ad4025d3">__HAL_RCC_GET_I2C1235_SOURCE</a>()</td></tr>
<tr class="memdesc:ga18d44d4471dc6940cdfa9ee4ad4025d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the I2C1/2/3/5* clock source.  <br /></td></tr>
<tr class="memitem:ga702d7cc3defaf9a4e69ab5ec4a262436" id="r_ga702d7cc3defaf9a4e69ab5ec4a262436"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_GET_I2C123_SOURCE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga18d44d4471dc6940cdfa9ee4ad4025d3">__HAL_RCC_GET_I2C1235_SOURCE</a></td></tr>
<tr class="memitem:ga7cd89ab045ec9b7d5bda7da3e1587828" id="r_ga7cd89ab045ec9b7d5bda7da3e1587828"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga7cd89ab045ec9b7d5bda7da3e1587828">__HAL_RCC_I2C1_CONFIG</a>&#160;&#160;&#160;__HAL_RCC_I2C123_CONFIG</td></tr>
<tr class="memdesc:ga7cd89ab045ec9b7d5bda7da3e1587828"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the I2C1 clock (I2C1CLK).  <br /></td></tr>
<tr class="memitem:gabc9e99366b5dfab7a6c535f8f48af8d3" id="r_gabc9e99366b5dfab7a6c535f8f48af8d3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gabc9e99366b5dfab7a6c535f8f48af8d3">__HAL_RCC_GET_I2C1_SOURCE</a>&#160;&#160;&#160;__HAL_RCC_GET_I2C123_SOURCE</td></tr>
<tr class="memdesc:gabc9e99366b5dfab7a6c535f8f48af8d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the I2C1 clock source.  <br /></td></tr>
<tr class="memitem:ga96d9bad1e46c94af8387ca6dbfeea357" id="r_ga96d9bad1e46c94af8387ca6dbfeea357"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga96d9bad1e46c94af8387ca6dbfeea357">__HAL_RCC_I2C2_CONFIG</a>&#160;&#160;&#160;__HAL_RCC_I2C123_CONFIG</td></tr>
<tr class="memdesc:ga96d9bad1e46c94af8387ca6dbfeea357"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the I2C2 clock (I2C2CLK).  <br /></td></tr>
<tr class="memitem:gabaa32df2434beb7a446be4aba5c2a06b" id="r_gabaa32df2434beb7a446be4aba5c2a06b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gabaa32df2434beb7a446be4aba5c2a06b">__HAL_RCC_GET_I2C2_SOURCE</a>&#160;&#160;&#160;__HAL_RCC_GET_I2C123_SOURCE</td></tr>
<tr class="memdesc:gabaa32df2434beb7a446be4aba5c2a06b"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the I2C2 clock source.  <br /></td></tr>
<tr class="memitem:ga335a0313bb3a188435b39a11cf7c3eee" id="r_ga335a0313bb3a188435b39a11cf7c3eee"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga335a0313bb3a188435b39a11cf7c3eee">__HAL_RCC_I2C3_CONFIG</a>&#160;&#160;&#160;__HAL_RCC_I2C123_CONFIG</td></tr>
<tr class="memdesc:ga335a0313bb3a188435b39a11cf7c3eee"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the I2C3 clock (I2C3CLK).  <br /></td></tr>
<tr class="memitem:ga06f70ebfa24caeb198001d5c02d6dc78" id="r_ga06f70ebfa24caeb198001d5c02d6dc78"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga06f70ebfa24caeb198001d5c02d6dc78">__HAL_RCC_GET_I2C3_SOURCE</a>&#160;&#160;&#160;__HAL_RCC_GET_I2C123_SOURCE</td></tr>
<tr class="memdesc:ga06f70ebfa24caeb198001d5c02d6dc78"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the I2C3 clock source.  <br /></td></tr>
<tr class="memitem:gac63fbd88afa59e3453a7d5d7c32fb1dc" id="r_gac63fbd88afa59e3453a7d5d7c32fb1dc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gac63fbd88afa59e3453a7d5d7c32fb1dc">__HAL_RCC_I2C4_CONFIG</a>(__I2C4CLKSource__)</td></tr>
<tr class="memdesc:gac63fbd88afa59e3453a7d5d7c32fb1dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the I2C4 clock (I2C4CLK).  <br /></td></tr>
<tr class="memitem:ga6632a1fbc809f6f6dedde0d36cbaa3c9" id="r_ga6632a1fbc809f6f6dedde0d36cbaa3c9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga6632a1fbc809f6f6dedde0d36cbaa3c9">__HAL_RCC_GET_I2C4_SOURCE</a>()</td></tr>
<tr class="memdesc:ga6632a1fbc809f6f6dedde0d36cbaa3c9"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the I2C4 clock source.  <br /></td></tr>
<tr class="memitem:ga5d331d1d7b05a87debf939ff00d961d5" id="r_ga5d331d1d7b05a87debf939ff00d961d5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga5d331d1d7b05a87debf939ff00d961d5">__HAL_RCC_USART16910_CONFIG</a>(__USART16910CLKSource__)</td></tr>
<tr class="memdesc:ga5d331d1d7b05a87debf939ff00d961d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the USART1/6/9* /10* clock (USART16CLK).  <br /></td></tr>
<tr class="memitem:gacc82f34fbb358dd2cad032a06eaf7ede" id="r_gacc82f34fbb358dd2cad032a06eaf7ede"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_USART16_CONFIG</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga5d331d1d7b05a87debf939ff00d961d5">__HAL_RCC_USART16910_CONFIG</a></td></tr>
<tr class="memitem:ga4f9d49aa3d088259c585f7509736818c" id="r_ga4f9d49aa3d088259c585f7509736818c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga4f9d49aa3d088259c585f7509736818c">__HAL_RCC_GET_USART16910_SOURCE</a>()</td></tr>
<tr class="memdesc:ga4f9d49aa3d088259c585f7509736818c"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the USART1/6/9* /10* clock source.  <br /></td></tr>
<tr class="memitem:gad51ff313be41917e24d3b074f56bb0ba" id="r_gad51ff313be41917e24d3b074f56bb0ba"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_GET_USART16_SOURCE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga4f9d49aa3d088259c585f7509736818c">__HAL_RCC_GET_USART16910_SOURCE</a></td></tr>
<tr class="memitem:ga67f80d0a54e4800370619e3247e3ae01" id="r_ga67f80d0a54e4800370619e3247e3ae01"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga67f80d0a54e4800370619e3247e3ae01">__HAL_RCC_USART234578_CONFIG</a>(__USART234578CLKSource__)</td></tr>
<tr class="memdesc:ga67f80d0a54e4800370619e3247e3ae01"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the USART234578 clock (USART234578CLK).  <br /></td></tr>
<tr class="memitem:ga2de2c847f3e490a5b6ac8b1d13b66883" id="r_ga2de2c847f3e490a5b6ac8b1d13b66883"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga2de2c847f3e490a5b6ac8b1d13b66883">__HAL_RCC_GET_USART234578_SOURCE</a>()</td></tr>
<tr class="memdesc:ga2de2c847f3e490a5b6ac8b1d13b66883"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the USART2/3/4/5/7/8 clock source.  <br /></td></tr>
<tr class="memitem:ga5c9ff3bd1509df21975b5a86202efd52" id="r_ga5c9ff3bd1509df21975b5a86202efd52"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga5c9ff3bd1509df21975b5a86202efd52">__HAL_RCC_USART1_CONFIG</a>&#160;&#160;&#160;__HAL_RCC_USART16_CONFIG</td></tr>
<tr class="memdesc:ga5c9ff3bd1509df21975b5a86202efd52"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the USART1 clock (USART1CLK).  <br /></td></tr>
<tr class="memitem:ga241bae96ad4a1ba687b3bf692e04f444" id="r_ga241bae96ad4a1ba687b3bf692e04f444"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga241bae96ad4a1ba687b3bf692e04f444">__HAL_RCC_GET_USART1_SOURCE</a>&#160;&#160;&#160;__HAL_RCC_GET_USART16_SOURCE</td></tr>
<tr class="memdesc:ga241bae96ad4a1ba687b3bf692e04f444"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the USART1 clock source.  <br /></td></tr>
<tr class="memitem:gaba22cefcb74b384a2e2fb3d2c51fae54" id="r_gaba22cefcb74b384a2e2fb3d2c51fae54"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gaba22cefcb74b384a2e2fb3d2c51fae54">__HAL_RCC_USART2_CONFIG</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga67f80d0a54e4800370619e3247e3ae01">__HAL_RCC_USART234578_CONFIG</a></td></tr>
<tr class="memdesc:gaba22cefcb74b384a2e2fb3d2c51fae54"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the USART2 clock (USART2CLK).  <br /></td></tr>
<tr class="memitem:ga59a86a292df891a219d5d4a8e26a45e9" id="r_ga59a86a292df891a219d5d4a8e26a45e9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga59a86a292df891a219d5d4a8e26a45e9">__HAL_RCC_GET_USART2_SOURCE</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga2de2c847f3e490a5b6ac8b1d13b66883">__HAL_RCC_GET_USART234578_SOURCE</a></td></tr>
<tr class="memdesc:ga59a86a292df891a219d5d4a8e26a45e9"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the USART2 clock source.  <br /></td></tr>
<tr class="memitem:gac1a20f806bcd2ec6cc781bab1d99e5b5" id="r_gac1a20f806bcd2ec6cc781bab1d99e5b5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gac1a20f806bcd2ec6cc781bab1d99e5b5">__HAL_RCC_USART3_CONFIG</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga67f80d0a54e4800370619e3247e3ae01">__HAL_RCC_USART234578_CONFIG</a></td></tr>
<tr class="memdesc:gac1a20f806bcd2ec6cc781bab1d99e5b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the USART3 clock (USART3CLK).  <br /></td></tr>
<tr class="memitem:ga04818c61b18e167ea60f290ab52247db" id="r_ga04818c61b18e167ea60f290ab52247db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga04818c61b18e167ea60f290ab52247db">__HAL_RCC_GET_USART3_SOURCE</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga2de2c847f3e490a5b6ac8b1d13b66883">__HAL_RCC_GET_USART234578_SOURCE</a></td></tr>
<tr class="memdesc:ga04818c61b18e167ea60f290ab52247db"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the USART3 clock source.  <br /></td></tr>
<tr class="memitem:ga711b187525b8b788b9f0ca968b1bd648" id="r_ga711b187525b8b788b9f0ca968b1bd648"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga711b187525b8b788b9f0ca968b1bd648">__HAL_RCC_UART4_CONFIG</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga67f80d0a54e4800370619e3247e3ae01">__HAL_RCC_USART234578_CONFIG</a></td></tr>
<tr class="memdesc:ga711b187525b8b788b9f0ca968b1bd648"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the UART4 clock (UART4CLK).  <br /></td></tr>
<tr class="memitem:ga9945c36dd4ffce9d8c1b213e56edf80a" id="r_ga9945c36dd4ffce9d8c1b213e56edf80a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga9945c36dd4ffce9d8c1b213e56edf80a">__HAL_RCC_GET_UART4_SOURCE</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga2de2c847f3e490a5b6ac8b1d13b66883">__HAL_RCC_GET_USART234578_SOURCE</a></td></tr>
<tr class="memdesc:ga9945c36dd4ffce9d8c1b213e56edf80a"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the UART4 clock source.  <br /></td></tr>
<tr class="memitem:gae6c043e0b4091279d4db065b38b801b1" id="r_gae6c043e0b4091279d4db065b38b801b1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gae6c043e0b4091279d4db065b38b801b1">__HAL_RCC_UART5_CONFIG</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga67f80d0a54e4800370619e3247e3ae01">__HAL_RCC_USART234578_CONFIG</a></td></tr>
<tr class="memdesc:gae6c043e0b4091279d4db065b38b801b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the UART5 clock (UART5CLK).  <br /></td></tr>
<tr class="memitem:ga2c68fe07259568cba46c14fc4259933d" id="r_ga2c68fe07259568cba46c14fc4259933d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga2c68fe07259568cba46c14fc4259933d">__HAL_RCC_GET_UART5_SOURCE</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga2de2c847f3e490a5b6ac8b1d13b66883">__HAL_RCC_GET_USART234578_SOURCE</a></td></tr>
<tr class="memdesc:ga2c68fe07259568cba46c14fc4259933d"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the UART5 clock source.  <br /></td></tr>
<tr class="memitem:ga28d9b1a1ce7ec3639b1d02ca10104704" id="r_ga28d9b1a1ce7ec3639b1d02ca10104704"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga28d9b1a1ce7ec3639b1d02ca10104704">__HAL_RCC_USART6_CONFIG</a>&#160;&#160;&#160;__HAL_RCC_USART16_CONFIG</td></tr>
<tr class="memdesc:ga28d9b1a1ce7ec3639b1d02ca10104704"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the USART6 clock (USART6CLK).  <br /></td></tr>
<tr class="memitem:ga134c539c1f80f684ee9722f08e4c89ea" id="r_ga134c539c1f80f684ee9722f08e4c89ea"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga134c539c1f80f684ee9722f08e4c89ea">__HAL_RCC_GET_USART6_SOURCE</a>&#160;&#160;&#160;__HAL_RCC_GET_USART16_SOURCE</td></tr>
<tr class="memdesc:ga134c539c1f80f684ee9722f08e4c89ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the USART6 clock source.  <br /></td></tr>
<tr class="memitem:ga60bd7f1550266967e3f87a85afbddb7a" id="r_ga60bd7f1550266967e3f87a85afbddb7a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga60bd7f1550266967e3f87a85afbddb7a">__HAL_RCC_UART7_CONFIG</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga67f80d0a54e4800370619e3247e3ae01">__HAL_RCC_USART234578_CONFIG</a></td></tr>
<tr class="memdesc:ga60bd7f1550266967e3f87a85afbddb7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the UART5 clock (UART7CLK).  <br /></td></tr>
<tr class="memitem:ga680abf193deaeff90542affda7d160d4" id="r_ga680abf193deaeff90542affda7d160d4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga680abf193deaeff90542affda7d160d4">__HAL_RCC_GET_UART7_SOURCE</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga2de2c847f3e490a5b6ac8b1d13b66883">__HAL_RCC_GET_USART234578_SOURCE</a></td></tr>
<tr class="memdesc:ga680abf193deaeff90542affda7d160d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the UART7 clock source.  <br /></td></tr>
<tr class="memitem:ga492a06425e99e15b064d5278cf319722" id="r_ga492a06425e99e15b064d5278cf319722"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga492a06425e99e15b064d5278cf319722">__HAL_RCC_UART8_CONFIG</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga67f80d0a54e4800370619e3247e3ae01">__HAL_RCC_USART234578_CONFIG</a></td></tr>
<tr class="memdesc:ga492a06425e99e15b064d5278cf319722"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the UART8 clock (UART8CLK).  <br /></td></tr>
<tr class="memitem:ga56b15263e2d6dcc75b362d96bf2f7397" id="r_ga56b15263e2d6dcc75b362d96bf2f7397"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga56b15263e2d6dcc75b362d96bf2f7397">__HAL_RCC_GET_UART8_SOURCE</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga2de2c847f3e490a5b6ac8b1d13b66883">__HAL_RCC_GET_USART234578_SOURCE</a></td></tr>
<tr class="memdesc:ga56b15263e2d6dcc75b362d96bf2f7397"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the UART8 clock source.  <br /></td></tr>
<tr class="memitem:ga2859926bab56d03f5d4bfbf0941a0a3f" id="r_ga2859926bab56d03f5d4bfbf0941a0a3f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga2859926bab56d03f5d4bfbf0941a0a3f">__HAL_RCC_LPUART1_CONFIG</a>(__LPUART1CLKSource__)</td></tr>
<tr class="memdesc:ga2859926bab56d03f5d4bfbf0941a0a3f"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the LPUART1 clock (LPUART1CLK).  <br /></td></tr>
<tr class="memitem:ga193015f4df5fb541bd4fbbc20d1e20ae" id="r_ga193015f4df5fb541bd4fbbc20d1e20ae"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga193015f4df5fb541bd4fbbc20d1e20ae">__HAL_RCC_GET_LPUART1_SOURCE</a>()</td></tr>
<tr class="memdesc:ga193015f4df5fb541bd4fbbc20d1e20ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the LPUART1 clock source.  <br /></td></tr>
<tr class="memitem:ga3ef78c8916149398bba06596863734ab" id="r_ga3ef78c8916149398bba06596863734ab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga3ef78c8916149398bba06596863734ab">__HAL_RCC_LPTIM1_CONFIG</a>(__LPTIM1CLKSource__)</td></tr>
<tr class="memdesc:ga3ef78c8916149398bba06596863734ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the LPTIM1 clock source.  <br /></td></tr>
<tr class="memitem:gad6688c07a2a8c314df547de8caf378bb" id="r_gad6688c07a2a8c314df547de8caf378bb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gad6688c07a2a8c314df547de8caf378bb">__HAL_RCC_GET_LPTIM1_SOURCE</a>()</td></tr>
<tr class="memdesc:gad6688c07a2a8c314df547de8caf378bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the LPTIM1 clock source.  <br /></td></tr>
<tr class="memitem:gabe82d482e8127576b6ce1f331fcc7e1a" id="r_gabe82d482e8127576b6ce1f331fcc7e1a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gabe82d482e8127576b6ce1f331fcc7e1a">__HAL_RCC_LPTIM2_CONFIG</a>(__LPTIM2CLKSource__)</td></tr>
<tr class="memdesc:gabe82d482e8127576b6ce1f331fcc7e1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the LPTIM2 clock source.  <br /></td></tr>
<tr class="memitem:ga806f1d6e6a7d741b4d0524aa849f8ed8" id="r_ga806f1d6e6a7d741b4d0524aa849f8ed8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga806f1d6e6a7d741b4d0524aa849f8ed8">__HAL_RCC_GET_LPTIM2_SOURCE</a>()</td></tr>
<tr class="memdesc:ga806f1d6e6a7d741b4d0524aa849f8ed8"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the LPTIM2 clock source.  <br /></td></tr>
<tr class="memitem:gac11efaec3a89a1b6d9696eb6e9e8048e" id="r_gac11efaec3a89a1b6d9696eb6e9e8048e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gac11efaec3a89a1b6d9696eb6e9e8048e">__HAL_RCC_LPTIM345_CONFIG</a>(__LPTIM345CLKSource__)</td></tr>
<tr class="memdesc:gac11efaec3a89a1b6d9696eb6e9e8048e"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the LPTIM3/4/5 clock source.  <br /></td></tr>
<tr class="memitem:ga6b2263ea1e054aee45c85e64dcfeb99f" id="r_ga6b2263ea1e054aee45c85e64dcfeb99f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga6b2263ea1e054aee45c85e64dcfeb99f">__HAL_RCC_GET_LPTIM345_SOURCE</a>()</td></tr>
<tr class="memdesc:ga6b2263ea1e054aee45c85e64dcfeb99f"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the LPTIM3/4/5 clock source.  <br /></td></tr>
<tr class="memitem:ga36174050acd330e879a5d12bdbfb19c4" id="r_ga36174050acd330e879a5d12bdbfb19c4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga36174050acd330e879a5d12bdbfb19c4">__HAL_RCC_LPTIM3_CONFIG</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#gac11efaec3a89a1b6d9696eb6e9e8048e">__HAL_RCC_LPTIM345_CONFIG</a></td></tr>
<tr class="memdesc:ga36174050acd330e879a5d12bdbfb19c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the LPTIM3 clock source.  <br /></td></tr>
<tr class="memitem:ga08d9d85cee6e2656f7a7b0cf920326b8" id="r_ga08d9d85cee6e2656f7a7b0cf920326b8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga08d9d85cee6e2656f7a7b0cf920326b8">__HAL_RCC_GET_LPTIM3_SOURCE</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga6b2263ea1e054aee45c85e64dcfeb99f">__HAL_RCC_GET_LPTIM345_SOURCE</a></td></tr>
<tr class="memdesc:ga08d9d85cee6e2656f7a7b0cf920326b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the LPTIM3 clock source.  <br /></td></tr>
<tr class="memitem:ga18a22f0e5f811ba9fee8bb2906dfa60b" id="r_ga18a22f0e5f811ba9fee8bb2906dfa60b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga18a22f0e5f811ba9fee8bb2906dfa60b">__HAL_RCC_FMC_CONFIG</a>(__FMCCLKSource__)</td></tr>
<tr class="memdesc:ga18a22f0e5f811ba9fee8bb2906dfa60b"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the FMC clock source.  <br /></td></tr>
<tr class="memitem:ga48733b3d8faeb67777184a503bbbf2fa" id="r_ga48733b3d8faeb67777184a503bbbf2fa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga48733b3d8faeb67777184a503bbbf2fa">__HAL_RCC_GET_FMC_SOURCE</a>()</td></tr>
<tr class="memdesc:ga48733b3d8faeb67777184a503bbbf2fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the FMC clock source.  <br /></td></tr>
<tr class="memitem:ga1c690ec86648d92efb97d2598a0cb2f1" id="r_ga1c690ec86648d92efb97d2598a0cb2f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga1c690ec86648d92efb97d2598a0cb2f1">__HAL_RCC_USB_CONFIG</a>(__USBCLKSource__)</td></tr>
<tr class="memdesc:ga1c690ec86648d92efb97d2598a0cb2f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to configure the USB clock (USBCLK).  <br /></td></tr>
<tr class="memitem:ga2b796e523b7f4c4cd7b5f06b7f995315" id="r_ga2b796e523b7f4c4cd7b5f06b7f995315"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga2b796e523b7f4c4cd7b5f06b7f995315">__HAL_RCC_GET_USB_SOURCE</a>()</td></tr>
<tr class="memdesc:ga2b796e523b7f4c4cd7b5f06b7f995315"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the USB clock source.  <br /></td></tr>
<tr class="memitem:ga03642b548896f327c3efc876aff4b349" id="r_ga03642b548896f327c3efc876aff4b349"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga03642b548896f327c3efc876aff4b349">__HAL_RCC_ADC_CONFIG</a>(__ADCCLKSource__)</td></tr>
<tr class="memdesc:ga03642b548896f327c3efc876aff4b349"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to configure the ADC clock.  <br /></td></tr>
<tr class="memitem:ga2ee9f1838a8450f949b548a06ed3bc58" id="r_ga2ee9f1838a8450f949b548a06ed3bc58"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga2ee9f1838a8450f949b548a06ed3bc58">__HAL_RCC_GET_ADC_SOURCE</a>()</td></tr>
<tr class="memdesc:ga2ee9f1838a8450f949b548a06ed3bc58"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the ADC clock source.  <br /></td></tr>
<tr class="memitem:gac23e7b662783a7131e3e892ff0c21f06" id="r_gac23e7b662783a7131e3e892ff0c21f06"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gac23e7b662783a7131e3e892ff0c21f06">__HAL_RCC_SWPMI1_CONFIG</a>(__SWPMI1CLKSource__)</td></tr>
<tr class="memdesc:gac23e7b662783a7131e3e892ff0c21f06"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to configure the SWPMI1 clock.  <br /></td></tr>
<tr class="memitem:ga3ddf343654e802758b5e779d81122404" id="r_ga3ddf343654e802758b5e779d81122404"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga3ddf343654e802758b5e779d81122404">__HAL_RCC_GET_SWPMI1_SOURCE</a>()</td></tr>
<tr class="memdesc:ga3ddf343654e802758b5e779d81122404"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the SWPMI1 clock source.  <br /></td></tr>
<tr class="memitem:ga79c4e732154d11fb10e6b5752ab31fc4" id="r_ga79c4e732154d11fb10e6b5752ab31fc4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga79c4e732154d11fb10e6b5752ab31fc4">__HAL_RCC_DFSDM1_CONFIG</a>(__DFSDM1CLKSource__)</td></tr>
<tr class="memdesc:ga79c4e732154d11fb10e6b5752ab31fc4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to configure the DFSDM1 clock.  <br /></td></tr>
<tr class="memitem:ga5bd849cb75a56ae9a27a164e7d3c8575" id="r_ga5bd849cb75a56ae9a27a164e7d3c8575"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga5bd849cb75a56ae9a27a164e7d3c8575">__HAL_RCC_GET_DFSDM1_SOURCE</a>()</td></tr>
<tr class="memdesc:ga5bd849cb75a56ae9a27a164e7d3c8575"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the DFSDM1 clock source.  <br /></td></tr>
<tr class="memitem:ga7aff87df867beb2eb7eddbbfe06fcdc6" id="r_ga7aff87df867beb2eb7eddbbfe06fcdc6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga7aff87df867beb2eb7eddbbfe06fcdc6">__HAL_RCC_CEC_CONFIG</a>(__CECCLKSource__)</td></tr>
<tr class="memdesc:ga7aff87df867beb2eb7eddbbfe06fcdc6"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the CEC clock (CECCLK).  <br /></td></tr>
<tr class="memitem:ga7a636a5c50887bba7270924c3eb6ef2f" id="r_ga7a636a5c50887bba7270924c3eb6ef2f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga7a636a5c50887bba7270924c3eb6ef2f">__HAL_RCC_GET_CEC_SOURCE</a>()</td></tr>
<tr class="memdesc:ga7a636a5c50887bba7270924c3eb6ef2f"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the CEC clock source.  <br /></td></tr>
<tr class="memitem:gaa463f3972818967005d31114221e1cdc" id="r_gaa463f3972818967005d31114221e1cdc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gaa463f3972818967005d31114221e1cdc">__HAL_RCC_CLKP_CONFIG</a>(__CLKPSource__)</td></tr>
<tr class="memdesc:gaa463f3972818967005d31114221e1cdc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to configure the CLKP : Oscillator clock for peripheral.  <br /></td></tr>
<tr class="memitem:ga5d047265ca753e28b45b09e53c3f50fe" id="r_ga5d047265ca753e28b45b09e53c3f50fe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga5d047265ca753e28b45b09e53c3f50fe">__HAL_RCC_GET_CLKP_SOURCE</a>()</td></tr>
<tr class="memdesc:ga5d047265ca753e28b45b09e53c3f50fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the Oscillator clock for peripheral source.  <br /></td></tr>
<tr class="memitem:ga8da215b69bc3712d5bb359c66198d374" id="r_ga8da215b69bc3712d5bb359c66198d374"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga8da215b69bc3712d5bb359c66198d374">__HAL_RCC_SPI123_CONFIG</a>(__RCC_SPI123CLKSource__)</td></tr>
<tr class="memdesc:ga8da215b69bc3712d5bb359c66198d374"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to Configure the SPI1/2/3 clock source.  <br /></td></tr>
<tr class="memitem:ga28d7eae98ab899dc6e1d4e80b8aea33d" id="r_ga28d7eae98ab899dc6e1d4e80b8aea33d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga28d7eae98ab899dc6e1d4e80b8aea33d">__HAL_RCC_GET_SPI123_SOURCE</a>()</td></tr>
<tr class="memdesc:ga28d7eae98ab899dc6e1d4e80b8aea33d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the SPI1/2/3 clock source.  <br /></td></tr>
<tr class="memitem:ga9b531a40f565975ef8901b48afddf1cc" id="r_ga9b531a40f565975ef8901b48afddf1cc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga9b531a40f565975ef8901b48afddf1cc">__HAL_RCC_SPI1_CONFIG</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga8da215b69bc3712d5bb359c66198d374">__HAL_RCC_SPI123_CONFIG</a></td></tr>
<tr class="memdesc:ga9b531a40f565975ef8901b48afddf1cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to Configure the SPI1 clock source.  <br /></td></tr>
<tr class="memitem:gaa390c5d70fdb5e8c4d9171a79e3e95a1" id="r_gaa390c5d70fdb5e8c4d9171a79e3e95a1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gaa390c5d70fdb5e8c4d9171a79e3e95a1">__HAL_RCC_GET_SPI1_SOURCE</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga28d7eae98ab899dc6e1d4e80b8aea33d">__HAL_RCC_GET_SPI123_SOURCE</a></td></tr>
<tr class="memdesc:gaa390c5d70fdb5e8c4d9171a79e3e95a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the SPI1 clock source.  <br /></td></tr>
<tr class="memitem:ga03aafcdc3a862d9f10a5d1fcce4b549e" id="r_ga03aafcdc3a862d9f10a5d1fcce4b549e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga03aafcdc3a862d9f10a5d1fcce4b549e">__HAL_RCC_SPI2_CONFIG</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga8da215b69bc3712d5bb359c66198d374">__HAL_RCC_SPI123_CONFIG</a></td></tr>
<tr class="memdesc:ga03aafcdc3a862d9f10a5d1fcce4b549e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to Configure the SPI2 clock source.  <br /></td></tr>
<tr class="memitem:gaf1fd8060d50a3ca2ee9e6d193546126e" id="r_gaf1fd8060d50a3ca2ee9e6d193546126e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gaf1fd8060d50a3ca2ee9e6d193546126e">__HAL_RCC_GET_SPI2_SOURCE</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga28d7eae98ab899dc6e1d4e80b8aea33d">__HAL_RCC_GET_SPI123_SOURCE</a></td></tr>
<tr class="memdesc:gaf1fd8060d50a3ca2ee9e6d193546126e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the SPI2 clock source.  <br /></td></tr>
<tr class="memitem:ga72e45b0673f5829c390032f8bbb24f17" id="r_ga72e45b0673f5829c390032f8bbb24f17"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga72e45b0673f5829c390032f8bbb24f17">__HAL_RCC_SPI3_CONFIG</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga8da215b69bc3712d5bb359c66198d374">__HAL_RCC_SPI123_CONFIG</a></td></tr>
<tr class="memdesc:ga72e45b0673f5829c390032f8bbb24f17"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to Configure the SPI3 clock source.  <br /></td></tr>
<tr class="memitem:ga05c66c28f3d72c123bb284e106a0d99b" id="r_ga05c66c28f3d72c123bb284e106a0d99b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga05c66c28f3d72c123bb284e106a0d99b">__HAL_RCC_GET_SPI3_SOURCE</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga28d7eae98ab899dc6e1d4e80b8aea33d">__HAL_RCC_GET_SPI123_SOURCE</a></td></tr>
<tr class="memdesc:ga05c66c28f3d72c123bb284e106a0d99b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the SPI3 clock source.  <br /></td></tr>
<tr class="memitem:gaecfe51f0d81f0130e1a5a06408320b72" id="r_gaecfe51f0d81f0130e1a5a06408320b72"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gaecfe51f0d81f0130e1a5a06408320b72">__HAL_RCC_SPI45_CONFIG</a>(__RCC_SPI45CLKSource__)</td></tr>
<tr class="memdesc:gaecfe51f0d81f0130e1a5a06408320b72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to Configure the SPI4/5 clock source.  <br /></td></tr>
<tr class="memitem:gafdcff08fc3544c712d1f4d2d17994842" id="r_gafdcff08fc3544c712d1f4d2d17994842"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gafdcff08fc3544c712d1f4d2d17994842">__HAL_RCC_GET_SPI45_SOURCE</a>()</td></tr>
<tr class="memdesc:gafdcff08fc3544c712d1f4d2d17994842"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the SPI4/5 clock source.  <br /></td></tr>
<tr class="memitem:ga04806afde06b2bc3b4e409b81fce5c41" id="r_ga04806afde06b2bc3b4e409b81fce5c41"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga04806afde06b2bc3b4e409b81fce5c41">__HAL_RCC_SPI4_CONFIG</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#gaecfe51f0d81f0130e1a5a06408320b72">__HAL_RCC_SPI45_CONFIG</a></td></tr>
<tr class="memdesc:ga04806afde06b2bc3b4e409b81fce5c41"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to Configure the SPI4 clock source.  <br /></td></tr>
<tr class="memitem:gaffce7a01f11a975120059a0a2a322d01" id="r_gaffce7a01f11a975120059a0a2a322d01"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gaffce7a01f11a975120059a0a2a322d01">__HAL_RCC_GET_SPI4_SOURCE</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#gafdcff08fc3544c712d1f4d2d17994842">__HAL_RCC_GET_SPI45_SOURCE</a></td></tr>
<tr class="memdesc:gaffce7a01f11a975120059a0a2a322d01"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the SPI4 clock source.  <br /></td></tr>
<tr class="memitem:ga14c138363b18bdee29cbb3ec82594b92" id="r_ga14c138363b18bdee29cbb3ec82594b92"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga14c138363b18bdee29cbb3ec82594b92">__HAL_RCC_SPI5_CONFIG</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#gaecfe51f0d81f0130e1a5a06408320b72">__HAL_RCC_SPI45_CONFIG</a></td></tr>
<tr class="memdesc:ga14c138363b18bdee29cbb3ec82594b92"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to Configure the SPI5 clock source.  <br /></td></tr>
<tr class="memitem:ga8ad4e833262fabd7960aab8946928a5f" id="r_ga8ad4e833262fabd7960aab8946928a5f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga8ad4e833262fabd7960aab8946928a5f">__HAL_RCC_GET_SPI5_SOURCE</a>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#gafdcff08fc3544c712d1f4d2d17994842">__HAL_RCC_GET_SPI45_SOURCE</a></td></tr>
<tr class="memdesc:ga8ad4e833262fabd7960aab8946928a5f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the SPI5 clock source.  <br /></td></tr>
<tr class="memitem:ga1170019b0ed2e1301d2284c2af149f33" id="r_ga1170019b0ed2e1301d2284c2af149f33"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga1170019b0ed2e1301d2284c2af149f33">__HAL_RCC_SPI6_CONFIG</a>(__RCC_SPI6CLKSource__)</td></tr>
<tr class="memdesc:ga1170019b0ed2e1301d2284c2af149f33"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to Configure the SPI6 clock source.  <br /></td></tr>
<tr class="memitem:ga8e7af9e242f90f474d245e72066e163f" id="r_ga8e7af9e242f90f474d245e72066e163f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga8e7af9e242f90f474d245e72066e163f">__HAL_RCC_GET_SPI6_SOURCE</a>()</td></tr>
<tr class="memdesc:ga8e7af9e242f90f474d245e72066e163f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the SPI6 clock source.  <br /></td></tr>
<tr class="memitem:ga7754edd5cc00e691c5007f22d3a93d38" id="r_ga7754edd5cc00e691c5007f22d3a93d38"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga7754edd5cc00e691c5007f22d3a93d38">__HAL_RCC_SDMMC_CONFIG</a>(__SDMMCCLKSource__)</td></tr>
<tr class="memdesc:ga7754edd5cc00e691c5007f22d3a93d38"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to configure the SDMMC clock.  <br /></td></tr>
<tr class="memitem:gacccdca63ee93770444eaab77cd831c75" id="r_gacccdca63ee93770444eaab77cd831c75"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gacccdca63ee93770444eaab77cd831c75">__HAL_RCC_GET_SDMMC_SOURCE</a>()</td></tr>
<tr class="memdesc:gacccdca63ee93770444eaab77cd831c75"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to get the SDMMC clock.  <br /></td></tr>
<tr class="memitem:gae34a5e47c3e3a519bfca1f4313a88f9f" id="r_gae34a5e47c3e3a519bfca1f4313a88f9f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gae34a5e47c3e3a519bfca1f4313a88f9f">__HAL_RCC_RNG_CONFIG</a>(__RNGCLKSource__)</td></tr>
<tr class="memdesc:gae34a5e47c3e3a519bfca1f4313a88f9f"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to configure the RNG clock (RNGCLK).  <br /></td></tr>
<tr class="memitem:gad8f27c485f7252991877f8e423b73d46" id="r_gad8f27c485f7252991877f8e423b73d46"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gad8f27c485f7252991877f8e423b73d46">__HAL_RCC_GET_RNG_SOURCE</a>()</td></tr>
<tr class="memdesc:gad8f27c485f7252991877f8e423b73d46"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro to get the RNG clock source.  <br /></td></tr>
<tr class="memitem:ga292ca7c84f192778314125ed6d7c8333" id="r_ga292ca7c84f192778314125ed6d7c8333"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga292ca7c84f192778314125ed6d7c8333">__HAL_RCC_TIMCLKPRESCALER</a>(__PRESC__)</td></tr>
<tr class="memdesc:ga292ca7c84f192778314125ed6d7c8333"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to configure the Timers clocks prescalers.  <br /></td></tr>
<tr class="memitem:gafca78bb6fbfed8a31ef7ee030d424b50" id="r_gafca78bb6fbfed8a31ef7ee030d424b50"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gafca78bb6fbfed8a31ef7ee030d424b50">__HAL_RCC_LSECSS_EXTI_ENABLE_IT</a>()</td></tr>
<tr class="memdesc:gafca78bb6fbfed8a31ef7ee030d424b50"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the RCC LSE CSS Extended Interrupt Line.  <br /></td></tr>
<tr class="memitem:gaa5c2a31f367b8085be517e315b8c0196" id="r_gaa5c2a31f367b8085be517e315b8c0196"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gaa5c2a31f367b8085be517e315b8c0196">__HAL_RCC_LSECSS_EXTI_DISABLE_IT</a>()</td></tr>
<tr class="memdesc:gaa5c2a31f367b8085be517e315b8c0196"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the RCC LSE CSS Extended Interrupt Line.  <br /></td></tr>
<tr class="memitem:gad5f8173d2752512c30375c9ca7890fbc" id="r_gad5f8173d2752512c30375c9ca7890fbc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gad5f8173d2752512c30375c9ca7890fbc">__HAL_RCC_LSECSS_EXTI_ENABLE_EVENT</a>()</td></tr>
<tr class="memdesc:gad5f8173d2752512c30375c9ca7890fbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the RCC LSE CSS Event Line.  <br /></td></tr>
<tr class="memitem:ga20711e52b237c9c598c87d5329a9700f" id="r_ga20711e52b237c9c598c87d5329a9700f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga20711e52b237c9c598c87d5329a9700f">__HAL_RCC_LSECSS_EXTI_DISABLE_EVENT</a>()</td></tr>
<tr class="memdesc:ga20711e52b237c9c598c87d5329a9700f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the RCC LSE CSS Event Line.  <br /></td></tr>
<tr class="memitem:ga45a0bf105427b24b377125346b2e597d" id="r_ga45a0bf105427b24b377125346b2e597d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga45a0bf105427b24b377125346b2e597d">__HAL_RCC_LSECSS_EXTI_ENABLE_FALLING_EDGE</a>()</td></tr>
<tr class="memdesc:ga45a0bf105427b24b377125346b2e597d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the RCC LSE CSS Extended Interrupt Falling Trigger.  <br /></td></tr>
<tr class="memitem:ga5b8a28d3896b67495b996d001084885e" id="r_ga5b8a28d3896b67495b996d001084885e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga5b8a28d3896b67495b996d001084885e">__HAL_RCC_LSECSS_EXTI_DISABLE_FALLING_EDGE</a>()</td></tr>
<tr class="memdesc:ga5b8a28d3896b67495b996d001084885e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the RCC LSE CSS Extended Interrupt Falling Trigger.  <br /></td></tr>
<tr class="memitem:ga14487ed9c109cb494cae4a9762b7c294" id="r_ga14487ed9c109cb494cae4a9762b7c294"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga14487ed9c109cb494cae4a9762b7c294">__HAL_RCC_LSECSS_EXTI_ENABLE_RISING_EDGE</a>()</td></tr>
<tr class="memdesc:ga14487ed9c109cb494cae4a9762b7c294"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the RCC LSE CSS Extended Interrupt Rising Trigger.  <br /></td></tr>
<tr class="memitem:ga2746b06cbf0f080a600f3f895c95f3fb" id="r_ga2746b06cbf0f080a600f3f895c95f3fb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga2746b06cbf0f080a600f3f895c95f3fb">__HAL_RCC_LSECSS_EXTI_DISABLE_RISING_EDGE</a>()</td></tr>
<tr class="memdesc:ga2746b06cbf0f080a600f3f895c95f3fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the RCC LSE CSS Extended Interrupt Rising Trigger.  <br /></td></tr>
<tr class="memitem:ga075e9194bfc08b5da32af130a74e7cb4" id="r_ga075e9194bfc08b5da32af130a74e7cb4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga075e9194bfc08b5da32af130a74e7cb4">__HAL_RCC_LSECSS_EXTI_ENABLE_RISING_FALLING_EDGE</a>()</td></tr>
<tr class="memdesc:ga075e9194bfc08b5da32af130a74e7cb4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the RCC LSE CSS Extended Interrupt Rising &amp; Falling Trigger.  <br /></td></tr>
<tr class="memitem:gacea34070069d535080039e3067aba82d" id="r_gacea34070069d535080039e3067aba82d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gacea34070069d535080039e3067aba82d">__HAL_RCC_LSECSS_EXTI_DISABLE_RISING_FALLING_EDGE</a>()</td></tr>
<tr class="memdesc:gacea34070069d535080039e3067aba82d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the RCC LSE CSS Extended Interrupt Rising &amp; Falling Trigger.  <br /></td></tr>
<tr class="memitem:ga65fa248e1dd8c7258a50ba03c4e2ff85" id="r_ga65fa248e1dd8c7258a50ba03c4e2ff85"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga65fa248e1dd8c7258a50ba03c4e2ff85">__HAL_RCC_LSECSS_EXTI_GET_FLAG</a>()</td></tr>
<tr class="memdesc:ga65fa248e1dd8c7258a50ba03c4e2ff85"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check whether the specified RCC LSE CSS EXTI interrupt flag is set or not.  <br /></td></tr>
<tr class="memitem:ga6171e2da4b75a993142330025862864f" id="r_ga6171e2da4b75a993142330025862864f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga6171e2da4b75a993142330025862864f">__HAL_RCC_LSECSS_EXTI_CLEAR_FLAG</a>()</td></tr>
<tr class="memdesc:ga6171e2da4b75a993142330025862864f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the RCC LSE CSS EXTI flag.  <br /></td></tr>
<tr class="memitem:gac5a7ed26daae142eb6cce551728ee88c" id="r_gac5a7ed26daae142eb6cce551728ee88c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gac5a7ed26daae142eb6cce551728ee88c">__HAL_RCC_LSECSS_EXTI_GENERATE_SWIT</a>()</td></tr>
<tr class="memdesc:gac5a7ed26daae142eb6cce551728ee88c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generate a Software interrupt on the RCC LSE CSS EXTI line.  <br /></td></tr>
<tr class="memitem:gae7a58e5b7b665d6fdd5af5f444d8ca8a" id="r_gae7a58e5b7b665d6fdd5af5f444d8ca8a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gae7a58e5b7b665d6fdd5af5f444d8ca8a">__HAL_RCC_CRS_ENABLE_IT</a>(__INTERRUPT__)</td></tr>
<tr class="memdesc:gae7a58e5b7b665d6fdd5af5f444d8ca8a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the specified CRS interrupts.  <br /></td></tr>
<tr class="memitem:ga83218d96e4d75af9508a18cb81ad1254" id="r_ga83218d96e4d75af9508a18cb81ad1254"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga83218d96e4d75af9508a18cb81ad1254">__HAL_RCC_CRS_DISABLE_IT</a>(__INTERRUPT__)</td></tr>
<tr class="memdesc:ga83218d96e4d75af9508a18cb81ad1254"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the specified CRS interrupts.  <br /></td></tr>
<tr class="memitem:ga86642491c37c596d1c07699030d40d48" id="r_ga86642491c37c596d1c07699030d40d48"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga86642491c37c596d1c07699030d40d48">__HAL_RCC_CRS_GET_IT_SOURCE</a>(__INTERRUPT__)</td></tr>
<tr class="memdesc:ga86642491c37c596d1c07699030d40d48"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check whether the CRS interrupt has occurred or not.  <br /></td></tr>
<tr class="memitem:ga4c5b57880a8c7e917998d0c6a73351fb" id="r_ga4c5b57880a8c7e917998d0c6a73351fb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga4c5b57880a8c7e917998d0c6a73351fb">RCC_CRS_IT_ERROR_MASK</a>&#160;&#160;&#160;((uint32_t)(<a class="el" href="group___r_c_c_ex___c_r_s___interrupt___sources.html#ga031f913312b8af1f38dc7c5adcd716f1">RCC_CRS_IT_TRIMOVF</a> | <a class="el" href="group___r_c_c_ex___c_r_s___interrupt___sources.html#gaf464654bbdfda5b86982fc4aa5b5a031">RCC_CRS_IT_SYNCERR</a> | <a class="el" href="group___r_c_c_ex___c_r_s___interrupt___sources.html#gac6b25a96e779b2f7ee3223101109ee33">RCC_CRS_IT_SYNCMISS</a>))</td></tr>
<tr class="memdesc:ga4c5b57880a8c7e917998d0c6a73351fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the CRS interrupt pending bits.  <br /></td></tr>
<tr class="memitem:ga8f7ada1acec652afe441dfc4515e18be" id="r_ga8f7ada1acec652afe441dfc4515e18be"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga8f7ada1acec652afe441dfc4515e18be">__HAL_RCC_CRS_CLEAR_IT</a>(__INTERRUPT__)</td></tr>
<tr class="memitem:gad40507a114061cddd85528ecc7555e1b" id="r_gad40507a114061cddd85528ecc7555e1b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gad40507a114061cddd85528ecc7555e1b">__HAL_RCC_CRS_GET_FLAG</a>(__FLAG__)</td></tr>
<tr class="memdesc:gad40507a114061cddd85528ecc7555e1b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check whether the specified CRS flag is set or not.  <br /></td></tr>
<tr class="memitem:ga39626ad9573958c96dccc66d13b1b6fe" id="r_ga39626ad9573958c96dccc66d13b1b6fe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#ga39626ad9573958c96dccc66d13b1b6fe">RCC_CRS_FLAG_ERROR_MASK</a>&#160;&#160;&#160;((uint32_t)(<a class="el" href="group___r_c_c_ex___c_r_s___flags.html#ga4c4c324494f9c6469e53d225242c73d4">RCC_CRS_FLAG_TRIMOVF</a> | <a class="el" href="group___r_c_c_ex___c_r_s___flags.html#gad49f59e34225920835b69a34f1b4c02b">RCC_CRS_FLAG_SYNCERR</a> | <a class="el" href="group___r_c_c_ex___c_r_s___flags.html#ga78549e9f343ad843d6e5d45b4e08433c">RCC_CRS_FLAG_SYNCMISS</a>))</td></tr>
<tr class="memdesc:ga39626ad9573958c96dccc66d13b1b6fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the CRS specified FLAG.  <br /></td></tr>
<tr class="memitem:gaf8b5160a2401847e5b9410c9a01e5922" id="r_gaf8b5160a2401847e5b9410c9a01e5922"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___exported___macros.html#gaf8b5160a2401847e5b9410c9a01e5922">__HAL_RCC_CRS_CLEAR_FLAG</a>(__FLAG__)</td></tr>
<tr class="memitem:ga59fe9365920d435138c487b85068cab0" id="r_ga59fe9365920d435138c487b85068cab0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___extended___features.html#ga59fe9365920d435138c487b85068cab0">__HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE</a>()</td></tr>
<tr class="memdesc:ga59fe9365920d435138c487b85068cab0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the oscillator clock for frequency error counter.  <br /></td></tr>
<tr class="memitem:ga92d96e3857c138d9a313f74de163e833" id="r_ga92d96e3857c138d9a313f74de163e833"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___extended___features.html#ga92d96e3857c138d9a313f74de163e833">__HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE</a>()</td></tr>
<tr class="memdesc:ga92d96e3857c138d9a313f74de163e833"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the oscillator clock for frequency error counter.  <br /></td></tr>
<tr class="memitem:gabed68fe74d544b1c602aa5a22a7af786" id="r_gabed68fe74d544b1c602aa5a22a7af786"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___extended___features.html#gabed68fe74d544b1c602aa5a22a7af786">__HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE</a>()</td></tr>
<tr class="memdesc:gabed68fe74d544b1c602aa5a22a7af786"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the automatic hardware adjustment of TRIM bits.  <br /></td></tr>
<tr class="memitem:ga1a3b49219a5d79ba0688074b56d33122" id="r_ga1a3b49219a5d79ba0688074b56d33122"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___extended___features.html#ga1a3b49219a5d79ba0688074b56d33122">__HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE</a>()</td></tr>
<tr class="memdesc:ga1a3b49219a5d79ba0688074b56d33122"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable or disable the automatic hardware adjustment of TRIM bits.  <br /></td></tr>
<tr class="memitem:ga5c48aa81c5416362a3cbb499754754a1" id="r_ga5c48aa81c5416362a3cbb499754754a1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___c_r_s___extended___features.html#ga5c48aa81c5416362a3cbb499754754a1">__HAL_RCC_CRS_RELOADVALUE_CALCULATE</a>(__FTARGET__,  __FSYNC__)</td></tr>
<tr class="memdesc:ga5c48aa81c5416362a3cbb499754754a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro to calculate reload value to be set in CRS register according to target and sync frequencies.  <br /></td></tr>
<tr class="memitem:ga3abe0529a500c28a4966def3c10b1d8a" id="r_ga3abe0529a500c28a4966def3c10b1d8a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga3abe0529a500c28a4966def3c10b1d8a">IS_RCC_PLL2CLOCKOUT_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:gadea4a5642fe4f4587ff3b94005f05ba8" id="r_gadea4a5642fe4f4587ff3b94005f05ba8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gadea4a5642fe4f4587ff3b94005f05ba8">IS_RCC_PLL3CLOCKOUT_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:gadc3d11348b86b7bc48c79cda6898ae2d" id="r_gadc3d11348b86b7bc48c79cda6898ae2d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gadc3d11348b86b7bc48c79cda6898ae2d">IS_RCC_USART16CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga33c0789ab2720363cc83caf5fee9001b" id="r_ga33c0789ab2720363cc83caf5fee9001b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_USART16910CLKSOURCE</b>&#160;&#160;&#160;IS_RCC_USART16CLKSOURCE</td></tr>
<tr class="memitem:ga1180123d9344bf6f633d765e5e81133b" id="r_ga1180123d9344bf6f633d765e5e81133b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga1180123d9344bf6f633d765e5e81133b">IS_RCC_USART234578CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga828f9258a850973f6ee939e325e239c3" id="r_ga828f9258a850973f6ee939e325e239c3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga828f9258a850973f6ee939e325e239c3">IS_RCC_USART1CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga36b5ab7748dc62f1f8dc5f82359d04ff" id="r_ga36b5ab7748dc62f1f8dc5f82359d04ff"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga36b5ab7748dc62f1f8dc5f82359d04ff">IS_RCC_USART2CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:gabe38dcde09511137c21b6f71ac2ae66f" id="r_gabe38dcde09511137c21b6f71ac2ae66f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gabe38dcde09511137c21b6f71ac2ae66f">IS_RCC_USART3CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:gaea7135b652e0031769de0fbeed229e34" id="r_gaea7135b652e0031769de0fbeed229e34"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gaea7135b652e0031769de0fbeed229e34">IS_RCC_UART4CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga524a449fc0038d8d8cb5d6ece08bbecc" id="r_ga524a449fc0038d8d8cb5d6ece08bbecc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga524a449fc0038d8d8cb5d6ece08bbecc">IS_RCC_UART5CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:gace2db76eeea59d1b23ed270cf20d9cf2" id="r_gace2db76eeea59d1b23ed270cf20d9cf2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gace2db76eeea59d1b23ed270cf20d9cf2">IS_RCC_USART6CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga08c6ce993835bf5a345efcf8ef2d6bc5" id="r_ga08c6ce993835bf5a345efcf8ef2d6bc5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga08c6ce993835bf5a345efcf8ef2d6bc5">IS_RCC_UART7CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga2196e372f374632181f3842f8490d1d9" id="r_ga2196e372f374632181f3842f8490d1d9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga2196e372f374632181f3842f8490d1d9">IS_RCC_UART8CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga3f3cc1549fa05c4ad513c7d7b82bb8e1" id="r_ga3f3cc1549fa05c4ad513c7d7b82bb8e1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga3f3cc1549fa05c4ad513c7d7b82bb8e1">IS_RCC_LPUART1CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga4da652409de876f4865b148c60492c45" id="r_ga4da652409de876f4865b148c60492c45"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga4da652409de876f4865b148c60492c45">IS_RCC_I2C123CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga8820aaf1685a3ad72352035de333e959" id="r_ga8820aaf1685a3ad72352035de333e959"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga8820aaf1685a3ad72352035de333e959">IS_RCC_I2C1CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:gafe6e7fc531ad84703bdd51cfe1ade549" id="r_gafe6e7fc531ad84703bdd51cfe1ade549"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gafe6e7fc531ad84703bdd51cfe1ade549">IS_RCC_I2C2CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga9e8e2558d03c4f1411649e4bea4de5fd" id="r_ga9e8e2558d03c4f1411649e4bea4de5fd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga9e8e2558d03c4f1411649e4bea4de5fd">IS_RCC_I2C3CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:gae09979039363e6d3dd27cf28b73f3aa3" id="r_gae09979039363e6d3dd27cf28b73f3aa3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gae09979039363e6d3dd27cf28b73f3aa3">IS_RCC_I2C4CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga6b5270c5272ea2fba88550185a2cbd9f" id="r_ga6b5270c5272ea2fba88550185a2cbd9f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga6b5270c5272ea2fba88550185a2cbd9f">IS_RCC_RNGCLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga95d965dbae61e31764a4cabf505ae97e" id="r_ga95d965dbae61e31764a4cabf505ae97e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga95d965dbae61e31764a4cabf505ae97e">IS_RCC_USBCLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:gaafc3b914638bc9f98857c6b9b2004373" id="r_gaafc3b914638bc9f98857c6b9b2004373"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gaafc3b914638bc9f98857c6b9b2004373">IS_RCC_SAI1CLK</a>(__SOURCE__)</td></tr>
<tr class="memitem:ga9017f18cc84e1d5d2c4096b2b0073724" id="r_ga9017f18cc84e1d5d2c4096b2b0073724"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga9017f18cc84e1d5d2c4096b2b0073724">IS_RCC_SPI123CLK</a>(__SOURCE__)</td></tr>
<tr class="memitem:gac5e9a4d3eb9a08654cdcb77e1c2d4847" id="r_gac5e9a4d3eb9a08654cdcb77e1c2d4847"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gac5e9a4d3eb9a08654cdcb77e1c2d4847">IS_RCC_SPI1CLK</a>(__SOURCE__)</td></tr>
<tr class="memitem:ga6ac2f4d10b489d1ffda76bb4733b2654" id="r_ga6ac2f4d10b489d1ffda76bb4733b2654"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga6ac2f4d10b489d1ffda76bb4733b2654">IS_RCC_SPI2CLK</a>(__SOURCE__)</td></tr>
<tr class="memitem:ga751c86d7636e7b28938326805e964eb1" id="r_ga751c86d7636e7b28938326805e964eb1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga751c86d7636e7b28938326805e964eb1">IS_RCC_SPI3CLK</a>(__SOURCE__)</td></tr>
<tr class="memitem:ga34cec366318bbc06bf677e14b6aa2339" id="r_ga34cec366318bbc06bf677e14b6aa2339"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga34cec366318bbc06bf677e14b6aa2339">IS_RCC_SPI45CLK</a>(__SOURCE__)</td></tr>
<tr class="memitem:ga532d32332df55c9bd9115f75484ac603" id="r_ga532d32332df55c9bd9115f75484ac603"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga532d32332df55c9bd9115f75484ac603">IS_RCC_SPI4CLK</a>(__SOURCE__)</td></tr>
<tr class="memitem:ga9b5acc8a57f3336da7b6b34663d1ff3e" id="r_ga9b5acc8a57f3336da7b6b34663d1ff3e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga9b5acc8a57f3336da7b6b34663d1ff3e">IS_RCC_SPI5CLK</a>(__SOURCE__)</td></tr>
<tr class="memitem:ga86142b6bc6e4c65ed263dd14d5d2faa4" id="r_ga86142b6bc6e4c65ed263dd14d5d2faa4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga86142b6bc6e4c65ed263dd14d5d2faa4">IS_RCC_SPI6CLK</a>(__SOURCE__)</td></tr>
<tr class="memitem:gae8bc41c01dcd05975b75ad637b7e2012" id="r_gae8bc41c01dcd05975b75ad637b7e2012"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gae8bc41c01dcd05975b75ad637b7e2012">IS_RCC_PLL3M_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:ga4534f3c60b720f3c9046462248f3d0b1" id="r_ga4534f3c60b720f3c9046462248f3d0b1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga4534f3c60b720f3c9046462248f3d0b1">IS_RCC_PLL3N_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:gaa74eb7af486ba492518a0a89a7ab2859" id="r_gaa74eb7af486ba492518a0a89a7ab2859"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gaa74eb7af486ba492518a0a89a7ab2859">IS_RCC_PLL3P_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:ga4c935f0f4764202c1557b046696a0b52" id="r_ga4c935f0f4764202c1557b046696a0b52"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga4c935f0f4764202c1557b046696a0b52">IS_RCC_PLL3Q_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:ga94b3f7650c70dfe268073f1664e36987" id="r_ga94b3f7650c70dfe268073f1664e36987"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga94b3f7650c70dfe268073f1664e36987">IS_RCC_PLL3R_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:ga73e7fe932b8ca6e414489a527e8e9083" id="r_ga73e7fe932b8ca6e414489a527e8e9083"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga73e7fe932b8ca6e414489a527e8e9083">IS_RCC_PLL2M_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:gaae926b21847d1cd8e2bd90cdd51dee7b" id="r_gaae926b21847d1cd8e2bd90cdd51dee7b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gaae926b21847d1cd8e2bd90cdd51dee7b">IS_RCC_PLL2N_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:ga53ac83f3b3ce834a6cf736864cc500ac" id="r_ga53ac83f3b3ce834a6cf736864cc500ac"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga53ac83f3b3ce834a6cf736864cc500ac">IS_RCC_PLL2P_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:gaad640313b88eb83c5da4920f2d1bdf59" id="r_gaad640313b88eb83c5da4920f2d1bdf59"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gaad640313b88eb83c5da4920f2d1bdf59">IS_RCC_PLL2Q_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:gafec08472ea1a737416ac1c7209a7a091" id="r_gafec08472ea1a737416ac1c7209a7a091"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gafec08472ea1a737416ac1c7209a7a091">IS_RCC_PLL2R_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:gac83449a89057cd13810a7c63ae51f72b" id="r_gac83449a89057cd13810a7c63ae51f72b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gac83449a89057cd13810a7c63ae51f72b">IS_RCC_PLL2RGE_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:ga31d03c773b60c3efee9da343b8b42a70" id="r_ga31d03c773b60c3efee9da343b8b42a70"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga31d03c773b60c3efee9da343b8b42a70">IS_RCC_PLL3RGE_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:ga7de83381cdcba7ba402b79148c63df0d" id="r_ga7de83381cdcba7ba402b79148c63df0d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga7de83381cdcba7ba402b79148c63df0d">IS_RCC_PLL2VCO_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:gaa61565322d743e1b61451cf289e1422f" id="r_gaa61565322d743e1b61451cf289e1422f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gaa61565322d743e1b61451cf289e1422f">IS_RCC_PLL3VCO_VALUE</a>(VALUE)</td></tr>
<tr class="memitem:gabbfe812d791edf4a04afcd155b504691" id="r_gabbfe812d791edf4a04afcd155b504691"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gabbfe812d791edf4a04afcd155b504691">IS_RCC_LPTIM1CLK</a>(SOURCE)</td></tr>
<tr class="memitem:ga35cdf5fe9d5ffc04da4adcb1b12487d7" id="r_ga35cdf5fe9d5ffc04da4adcb1b12487d7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga35cdf5fe9d5ffc04da4adcb1b12487d7">IS_RCC_LPTIM2CLK</a>(SOURCE)</td></tr>
<tr class="memitem:ga7989c28cafd63920389fe37ef9dcb3d8" id="r_ga7989c28cafd63920389fe37ef9dcb3d8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga7989c28cafd63920389fe37ef9dcb3d8">IS_RCC_LPTIM345CLK</a>(SOURCE)</td></tr>
<tr class="memitem:gaf82d855bacee67f951588ab4711ca1c1" id="r_gaf82d855bacee67f951588ab4711ca1c1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gaf82d855bacee67f951588ab4711ca1c1">IS_RCC_LPTIM3CLK</a>(SOURCE)</td></tr>
<tr class="memitem:gac5676819fd8aabc744beb60ed7d21347" id="r_gac5676819fd8aabc744beb60ed7d21347"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gac5676819fd8aabc744beb60ed7d21347">IS_RCC_FMCCLK</a>(__SOURCE__)</td></tr>
<tr class="memitem:ga4313715e6dab01244eccc4e62fd3f3bb" id="r_ga4313715e6dab01244eccc4e62fd3f3bb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga4313715e6dab01244eccc4e62fd3f3bb">IS_RCC_SDMMC</a>(__SOURCE__)</td></tr>
<tr class="memitem:gae86c1d12e7257aefe30253d01e3b88a9" id="r_gae86c1d12e7257aefe30253d01e3b88a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gae86c1d12e7257aefe30253d01e3b88a9">IS_RCC_ADCCLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:gaa2d874dccf5a93f5fda9ce18bca4df6a" id="r_gaa2d874dccf5a93f5fda9ce18bca4df6a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gaa2d874dccf5a93f5fda9ce18bca4df6a">IS_RCC_SWPMI1CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga877f232cbefe951b3ede7d30f308efc4" id="r_ga877f232cbefe951b3ede7d30f308efc4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga877f232cbefe951b3ede7d30f308efc4">IS_RCC_DFSDM1CLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga6a6c9ffe3ed46ab77c78e59ec6b4caf2" id="r_ga6a6c9ffe3ed46ab77c78e59ec6b4caf2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga6a6c9ffe3ed46ab77c78e59ec6b4caf2">IS_RCC_SPDIFRXCLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga007960aa04439c47fd14e2d2226681a5" id="r_ga007960aa04439c47fd14e2d2226681a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga007960aa04439c47fd14e2d2226681a5">IS_RCC_CECCLKSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:ga39d03b55df0de78c00b340e27e966a68" id="r_ga39d03b55df0de78c00b340e27e966a68"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga39d03b55df0de78c00b340e27e966a68">IS_RCC_CLKPSOURCE</a>(SOURCE)</td></tr>
<tr class="memitem:gae39160e663f013f1c34faafdae884388" id="r_gae39160e663f013f1c34faafdae884388"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gae39160e663f013f1c34faafdae884388">IS_RCC_TIMPRES</a>(VALUE)</td></tr>
<tr class="memitem:ga1b83c1225c7c356e40d6429a2397f3d6" id="r_ga1b83c1225c7c356e40d6429a2397f3d6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga1b83c1225c7c356e40d6429a2397f3d6">IS_RCC_SCOPE_WWDG</a>(WWDG)</td></tr>
<tr class="memitem:ga2fd1229d31ed8850789d9e4a144f8308" id="r_ga2fd1229d31ed8850789d9e4a144f8308"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga2fd1229d31ed8850789d9e4a144f8308">IS_RCC_CRS_SYNC_SOURCE</a>(__SOURCE__)</td></tr>
<tr class="memitem:gaea1219bf86f53408e2fe7f6635af114a" id="r_gaea1219bf86f53408e2fe7f6635af114a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gaea1219bf86f53408e2fe7f6635af114a">IS_RCC_CRS_SYNC_DIV</a>(__DIV__)</td></tr>
<tr class="memitem:gab50c54ca7f73196e1ba4d5e57cff4f0c" id="r_gab50c54ca7f73196e1ba4d5e57cff4f0c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gab50c54ca7f73196e1ba4d5e57cff4f0c">IS_RCC_CRS_SYNC_POLARITY</a>(__POLARITY__)</td></tr>
<tr class="memitem:gadd5287c3fd0e1fbaf6dfe6f49e129c89" id="r_gadd5287c3fd0e1fbaf6dfe6f49e129c89"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gadd5287c3fd0e1fbaf6dfe6f49e129c89">IS_RCC_CRS_RELOADVALUE</a>(__VALUE__)</td></tr>
<tr class="memitem:gac3cf3243c3534e979173808f3aa5242c" id="r_gac3cf3243c3534e979173808f3aa5242c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gac3cf3243c3534e979173808f3aa5242c">IS_RCC_CRS_ERRORLIMIT</a>(__VALUE__)</td></tr>
<tr class="memitem:ga2a18f27194a0568a5e4c175aab9ca78a" id="r_ga2a18f27194a0568a5e4c175aab9ca78a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#ga2a18f27194a0568a5e4c175aab9ca78a">IS_RCC_CRS_HSI48CALIBRATION</a>(__VALUE__)</td></tr>
<tr class="memitem:gaab22edfb0bac18a208650b6a7aa96156" id="r_gaab22edfb0bac18a208650b6a7aa96156"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c_ex___i_s___r_c_c___definitions.html#gaab22edfb0bac18a208650b6a7aa96156">IS_RCC_CRS_FREQERRORDIR</a>(__DIR__)</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-func-members" class="groupheader"><a id="func-members" name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga0c0f61a1e2f47cc81bc43d83ba3e0d95" id="r_ga0c0f61a1e2f47cc81bc43d83ba3e0d95"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_PeriphCLKConfig</b> (<a class="el" href="struct_r_c_c___periph_c_l_k_init_type_def.html">RCC_PeriphCLKInitTypeDef</a> *PeriphClkInit)</td></tr>
<tr class="memitem:ga754fc5136c63ad52b7c459aafc8a3927" id="r_ga754fc5136c63ad52b7c459aafc8a3927"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_GetPeriphCLKConfig</b> (<a class="el" href="struct_r_c_c___periph_c_l_k_init_type_def.html">RCC_PeriphCLKInitTypeDef</a> *PeriphClkInit)</td></tr>
<tr class="memitem:gac160dcf1dc2da8e71b142b10f98a2452" id="r_gac160dcf1dc2da8e71b142b10f98a2452"><td class="memItemLeft" align="right" valign="top">
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_GetPeriphCLKFreq</b> (uint64_t PeriphClk)</td></tr>
<tr class="memitem:ga8f57272fd5ec28bfff6cd591e69fafa8" id="r_ga8f57272fd5ec28bfff6cd591e69fafa8"><td class="memItemLeft" align="right" valign="top">
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_GetD1PCLK1Freq</b> (void)</td></tr>
<tr class="memitem:ga2d01123c5ecc1b82fcc44b231650c287" id="r_ga2d01123c5ecc1b82fcc44b231650c287"><td class="memItemLeft" align="right" valign="top">
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_GetD3PCLK1Freq</b> (void)</td></tr>
<tr class="memitem:gaf9d7b3f29992e92239629830c35492f1" id="r_gaf9d7b3f29992e92239629830c35492f1"><td class="memItemLeft" align="right" valign="top">
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_GetD1SysClockFreq</b> (void)</td></tr>
<tr class="memitem:gab337c3e7337cd51213340dc99aed1307" id="r_gab337c3e7337cd51213340dc99aed1307"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_GetPLL1ClockFreq</b> (<a class="el" href="struct_p_l_l1___clocks_type_def.html">PLL1_ClocksTypeDef</a> *PLL1_Clocks)</td></tr>
<tr class="memitem:gafef61fa6c64f47497900d47b258c609a" id="r_gafef61fa6c64f47497900d47b258c609a"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_GetPLL2ClockFreq</b> (<a class="el" href="struct_p_l_l2___clocks_type_def.html">PLL2_ClocksTypeDef</a> *PLL2_Clocks)</td></tr>
<tr class="memitem:ga95d5e7fe6070aa6e9b94d8d6b6aa0f19" id="r_ga95d5e7fe6070aa6e9b94d8d6b6aa0f19"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_GetPLL3ClockFreq</b> (<a class="el" href="struct_p_l_l3___clocks_type_def.html">PLL3_ClocksTypeDef</a> *PLL3_Clocks)</td></tr>
<tr class="memitem:gab5a363cbbf01f48cc19db511919c5a1a" id="r_gab5a363cbbf01f48cc19db511919c5a1a"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_WakeUpStopCLKConfig</b> (uint32_t WakeUpClk)</td></tr>
<tr class="memitem:ga0f34a5e49a0da8ce17f1ee14f4c38b99" id="r_ga0f34a5e49a0da8ce17f1ee14f4c38b99"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_KerWakeUpStopCLKConfig</b> (uint32_t WakeUpClk)</td></tr>
<tr class="memitem:ga7d237da5647613e86a997794b864f0fa" id="r_ga7d237da5647613e86a997794b864f0fa"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_EnableLSECSS</b> (void)</td></tr>
<tr class="memitem:gae5959cd3a8acfbed2c967f7b2336151c" id="r_gae5959cd3a8acfbed2c967f7b2336151c"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_DisableLSECSS</b> (void)</td></tr>
<tr class="memitem:ga8ddfc54f96412cceafa11f4a6389e261" id="r_ga8ddfc54f96412cceafa11f4a6389e261"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_EnableLSECSS_IT</b> (void)</td></tr>
<tr class="memitem:ga88a422344cd65e2eda4107252c1fc749" id="r_ga88a422344cd65e2eda4107252c1fc749"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_LSECSS_IRQHandler</b> (void)</td></tr>
<tr class="memitem:ga6a0c850cc08b2788116cf0c2bf993778" id="r_ga6a0c850cc08b2788116cf0c2bf993778"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_LSECSS_Callback</b> (void)</td></tr>
<tr class="memitem:gae8ba4c6b3bb03e0da2e47f6021f604dd" id="r_gae8ba4c6b3bb03e0da2e47f6021f604dd"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_CRSConfig</b> (const <a class="el" href="struct_r_c_c___c_r_s_init_type_def.html">RCC_CRSInitTypeDef</a> *pInit)</td></tr>
<tr class="memitem:ga86396ba393ce7d6f281e05f48cd3ec2b" id="r_ga86396ba393ce7d6f281e05f48cd3ec2b"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_CRSSoftwareSynchronizationGenerate</b> (void)</td></tr>
<tr class="memitem:gac754e839322ace8f02877dc1319b34a3" id="r_gac754e839322ace8f02877dc1319b34a3"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_CRSGetSynchronizationInfo</b> (<a class="el" href="struct_r_c_c___c_r_s_synchro_info_type_def.html">RCC_CRSSynchroInfoTypeDef</a> *pSynchroInfo)</td></tr>
<tr class="memitem:ga623701a0cb366305413543c2c89bef29" id="r_ga623701a0cb366305413543c2c89bef29"><td class="memItemLeft" align="right" valign="top">
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_CRSWaitSynchronization</b> (uint32_t Timeout)</td></tr>
<tr class="memitem:ga3710de647aea4827fdbf7905b5ce2924" id="r_ga3710de647aea4827fdbf7905b5ce2924"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_CRS_IRQHandler</b> (void)</td></tr>
<tr class="memitem:gaddbb57481193443f55447c286a020bab" id="r_gaddbb57481193443f55447c286a020bab"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_CRS_SyncOkCallback</b> (void)</td></tr>
<tr class="memitem:ga28bef4e082590e1da595636a618b2987" id="r_ga28bef4e082590e1da595636a618b2987"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_CRS_SyncWarnCallback</b> (void)</td></tr>
<tr class="memitem:ga5d79ff3aaa03c7c75492da2d1f4dda98" id="r_ga5d79ff3aaa03c7c75492da2d1f4dda98"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_CRS_ExpectedSyncCallback</b> (void)</td></tr>
<tr class="memitem:ga5f6495c4f5eb276c52e54a84623f0f88" id="r_ga5f6495c4f5eb276c52e54a84623f0f88"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCCEx_CRS_ErrorCallback</b> (uint32_t Error)</td></tr>
</table>
<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Header file of RCC HAL Extension module. </p>
<dl class="section author"><dt>Author</dt><dd>MCD Application Team </dd></dl>
<dl class="section attention"><dt>Attention</dt><dd></dd></dl>
<p>Copyright (c) 2017 STMicroelectronics. All rights reserved.</p>
<p>This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS. </p>
</div></div><!-- contents -->
</div><!-- doc-content -->
<div id="page-nav" class="page-nav-panel">
<div id="page-nav-resize-handle"></div>
<div id="page-nav-tree">
<div id="page-nav-contents">
</div><!-- page-nav-contents -->
</div><!-- page-nav-tree -->
</div><!-- page-nav -->
</div><!-- container -->
<!-- start footer part -->
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
  <ul>
    <li class="navelem"><a href="dir_60925fc218da8ca7908795bf5f624060.html">Drivers</a></li><li class="navelem"><a href="dir_7baec2ddb99168f99d1052c1aec46b20.html">STM32H7xx_HAL_Driver</a></li><li class="navelem"><a href="dir_4f22a8fa6199c96df71a89cbd7613f35.html">Inc</a></li><li class="navelem"><a href="stm32h7xx__hal__rcc__ex_8h.html">stm32h7xx_hal_rcc_ex.h</a></li>
    <li class="footer">Generated by <a href="https://www.doxygen.org/index.html"><img class="footer" src="doxygen.svg" width="104" height="31" alt="doxygen"/></a> 1.14.0 </li>
  </ul>
</div>
</body>
</html>
